Alternatives and similar repositories for coreboot4HiFive1:

Users that are interested in coreboot4HiFive1 are comparing it to the libraries listed below

• OpenCAPI / omi_device_ice
  An example OMI Device FPGA with 2 DDR4 memory ports
  ☆16Updated 2 years ago
• betrusted-io / gateware
  IP submodules, formatted for easier CI integration
  ☆29Updated last year
• ArcaneNibble / project-chibi
  Altera MAX V bitstream documentation -- CLEANUP PENDING
  ☆19Updated 4 years ago
• KestrelComputer / polaris
  RISC-V RV64IS-compatible processor for the Kestrel-3
  ☆21Updated last year
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆55Updated last month
• YosysHQ / prjtrellis-db
  Project Trellis database
  ☆13Updated last year
• f32c / tools
  ULX2S / ULX3S FPGA JTAG programmer & tools (Lattice XP2 / ECP5)
  ☆22Updated 3 months ago
• mballance / fwrisc-s
  ☆10Updated 5 years ago
• ArcaneNibble / yavhdl
  Yet Another VHDL tool
  ☆31Updated 7 years ago
• whitequark / Yumewatari
  妖刀夢渡
  ☆59Updated 5 years ago
• gsomlo / yoloRISC
  A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga
  ☆26Updated 5 years ago
• haojunliu / OpenFPGA
  OpenFPGA
  ☆33Updated 6 years ago
• ultraembedded / riscv_sbc
  A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.
  ☆28Updated 4 years ago
• nathanrossi / meta-hdl
  HDL tools layer for OpenEmbedded
  ☆17Updated 4 months ago
• embecosm / chiphack
  Repository and Wiki for Chip Hack events.
  ☆50Updated 3 years ago
• secworks / blake2s
  Verilog implementation of the 32-bit version of the Blake2 hash function
  ☆21Updated last year
• tommythorn / yari
  YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includ…
  ☆44Updated 2 months ago
• lambdaconcept / litesdcard
  ☆25Updated 6 years ago
• ZipCPU / zbasic
  A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
  ☆43Updated 2 years ago
• azonenberg / jtaghal
  JTAG Hardware Abstraction Library
  ☆36Updated last year
• jevinskie / litespih4x
  SPI flash MITM and emulation (QSPI is a WIP)
  ☆20Updated 3 years ago
• alexforencich / pin-uart
  FPGA board-level debugging and reverse-engineering tool
  ☆34Updated last year
• www-asics-ws / usb1_device
  USB 1.1 Device IP Core
  ☆19Updated 7 years ago
• spacemonkeydelivers / riscv_security_contest_project
  ☆9Updated 2 years ago
• grayresearch / s4ga
  a small simple slow serial FPGA core
  ☆16Updated 3 years ago
• antmicro / usb-test-suite-build
  Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores
  ☆50Updated last year
• sergachev / litex-template
  Template project for LiteX-based SoCs
  ☆19Updated 7 months ago
• b224hisl / rioschip
  ☆33Updated 2 years ago
• zhemao / riscv-dma
  A DMA Controller for RISCV CPUs
  ☆14Updated 9 years ago
• enjoy-digital / daisho
  Test of the USB3 IP Core from Daisho on a Xilinx device
  ☆86Updated 5 years ago