Verilog Code for an 8-bit ALU
☆15Oct 29, 2016Updated 9 years ago
Alternatives and similar repositories for alu-8bit
Users that are interested in alu-8bit are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- This is a solution to the Multi-Step Form Challenge on Frontend Mentor using Angular.☆14Mar 16, 2023Updated 3 years ago
- 32-Bit Algorithms of Floating Point Operations are implemented on Verilog with logic Operations.☆103Apr 30, 2019Updated 7 years ago
- "Designing Video Game Hardware in Verilog" in iCE40HX8K Breakout Board.☆18Dec 31, 2019Updated 6 years ago
- All of my Verilog_HDL codes☆11Apr 5, 2021Updated 5 years ago
- verification of the basic router protocol with UVM testbech //INCLUDED WITH RTL☆15Jan 4, 2019Updated 7 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- Examples of unions, interfaces, and assertions in SystemVerilog☆14Aug 31, 2013Updated 13 years ago
- A set of yasnippets for emacs that assist with SystemVerilog☆11Nov 25, 2011Updated 14 years ago
- Codes built although the knowledge acquired at Ignite, a bootcamp focused in React Native learnings.☆25Dec 28, 2021Updated 4 years ago
- FIR band-pass filter using Verilog HDL.☆14Sep 7, 2026Updated 3 weeks ago
- Digital Systems Course Project: Fake Currency Detection in Verilog using Basys3 FPGA and MATLAB☆10Sep 30, 2020Updated 5 years ago
- Asynchronous fifo in verilog☆38Mar 20, 2016Updated 10 years ago
- ☆36Mar 8, 2023Updated 3 years ago
- Find first derivatives of functions automagically☆10Feb 21, 2017Updated 9 years ago
- Verilog HDL implementation of an ECHO machine and an FIR filter that filters out a specific noise. More details provided in individual fi…☆10Aug 25, 2019Updated 7 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- All digital PLL☆31Dec 19, 2017Updated 8 years ago
- Design a median filter for a Generic RGB image.☆14Mar 6, 2019Updated 7 years ago
- Implementation of the CMAC keyed hash function using AES as block cipher.☆16Apr 2, 2025Updated last year
- A design of 15-order FIR filter using Verilog, with modulation and demodulation system using MATLAB☆11Aug 15, 2020Updated 6 years ago
- AES☆16Oct 4, 2022Updated 3 years ago
- AVR course at Brno University of Technology☆29Feb 8, 2026Updated 7 months ago
- learning VHDL☆12Jul 1, 2014Updated 12 years ago
- Zedboard projects☆11May 15, 2016Updated 10 years ago
- AES-128 Encryption☆11Jul 17, 2014Updated 12 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- RISC-V assembler/simulator with GUI☆13Jul 31, 2022Updated 4 years ago
- SPI to I2C Protocol Conversion Using Verilog. Final Year BTech project. Also published an IEEE paper.☆15Jul 28, 2021Updated 5 years ago
- A library to parse BLIF (Berkeley Logic Interchange Format) files.☆10Mar 11, 2015Updated 11 years ago
- Verilog language support in Atom☆18Jun 30, 2019Updated 7 years ago
- ☆10Dec 4, 2016Updated 9 years ago
- Mobilenet v1 (3,128,128, alpha=0.25) on STMH7 using STMCube AI☆10Oct 25, 2019Updated 6 years ago
- IEEE Executive project for the year 2021-2022☆13Nov 22, 2022Updated 3 years ago
- LSTM neural network (verilog)☆16Dec 5, 2018Updated 7 years ago
- Netlist and Verilog Haskell Package☆19Nov 21, 2010Updated 15 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- LZW Compressoion algorithm in verilog☆16Dec 19, 2013Updated 12 years ago
- ☆16May 8, 2018Updated 8 years ago
- An accurate Electro Cardio Graph system, with peak detection and counting mechanism programmed in Verilog.☆15Jan 6, 2019Updated 7 years ago
- Project: Precise Measure of time delays in FPGA☆33Aug 3, 2017Updated 9 years ago
- An automatic clock gating utility☆53Apr 15, 2025Updated last year
- MAC system with IEEE754 compatibility☆14Nov 22, 2023Updated 2 years ago
- 16QAM modulation and demodulation by Verilog☆20Jan 4, 2021Updated 5 years ago