Alternatives and similar repositories for OFDM_802_22

Users that are interested in OFDM_802_22 are comparing it to the libraries listed below

• phthinh / OFDM_802_11
  IEEE 802.11 OFDM-based transceiver system
  ☆39Updated 7 years ago
• yugithub / OFDM-baseband
  Verilog实现OFDM基带
  ☆44Updated 9 years ago
• phthinh / OFDM_802_16
  IEEE 802.16 OFDM-based transceiver system
  ☆28Updated 6 years ago
• Teddy-van-Jerry / sdr-psk-fpga
  Dual-Mode PSK Transceiver on SDR With FPGA
  ☆47Updated last year
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆54Updated 2 years ago
• Grootzz / AD9361_TX_MSK
  A project demonstrate how to config ad9361 to TX mode and how to transmit MSK
  ☆59Updated 6 years ago
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆57Updated last year
• codyps / wimax_ofdm
  Partial Verilog implimentation of a WiMAX OFDM Phy
  ☆19Updated 13 years ago
• coralhu123 / KC705-AD9371
  The implementation of AD9371 on KC705
  ☆20Updated 4 months ago
• myriadrf / LimeSDR-PCIe_GW
  Altera Cyclone IV FPGA project for the PCIe LimeSDR board
  ☆41Updated 2 years ago
• RedFlag2017 / rs-codec
  Reed Solomon Encoder and Decoder Digital IP
  ☆21Updated 5 years ago
• Elrori / FMCW_Radar
  FMCW Radar verilog project
  ☆32Updated 5 years ago
• cudnn / USBtoMIPI
  - Use FPGA to implement MIPI interface; - Get command from PC through USB communication; - Decode command in FPGA
  ☆12Updated 8 years ago
• lisliyongming / JESD204B
  通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结
  ☆23Updated 5 years ago
• MicroPhase / antsdr_standalone
  Standalone application based on ADI hdl and no_OS for ANTSDR.
  ☆22Updated 7 months ago
• owocomm-0 / fpga-fft
  A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
  ☆121Updated 4 years ago
• cjhonlyone / ADC-lvds
  Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS
  ☆57Updated 3 years ago
• Bucknalla / ip_cores
  Verilog IP Cores & Tests
  ☆13Updated 7 years ago
• ZipCPU / dpll
  A collection of phase locked loop (PLL) related projects
  ☆111Updated last year
• BBN-Q / VHDL-JESD204b
  JESD204b modules in VHDL
  ☆30Updated 6 years ago
• delhatch / Zynq_UDP
  Transfer data over UDP with a Zedboard. This is an example project that transmits and receives data over UDP.
  ☆27Updated 4 years ago
• Hamid-R-Tanhaei / ZYNQ_ADC_DMA_LWIP
  Interfacing ZYNQ SoC device with ADC, Transferring data through DMA and LwIP
  ☆53Updated 4 years ago
• FDU-ME-ARC / NVMeCHA
  ☆19Updated 4 years ago
• uwemeyerbaese / DSP_with_FPGAs_ed4
  DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3
  ☆66Updated 3 years ago
• CoreyChen922 / sata3_host_controller
  It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.
  ☆75Updated last year
• Lcrypto / FEC-Archive-Verilog
  Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…
  ☆76Updated 2 years ago
• analogdevicesinc / TransceiverToolbox
  MATLAB toolbox for ADI transceiver products
  ☆62Updated 7 months ago
• open-sdr / openofdm
  Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.
  ☆120Updated 3 months ago
• strath-sdr / rfsoc_studio
  The Strathclyde RFSoC Studio Installer for PYNQ.
  ☆33Updated 2 years ago
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆46Updated 5 years ago