Alternatives and similar repositories for orconf

Users that are interested in orconf are comparing it to the libraries listed below

• pulp-platform / bigpulp
  ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform
  ☆51Updated 3 years ago
• librecores / librecores-web
  LibreCores Web Site
  ☆35Updated 2 years ago
• The-OpenROAD-Project / OpenROAD-Cloud
  The source code that empowers OpenROAD Cloud
  ☆12Updated 4 years ago
• YosysHQ / yosys-plugins
  Yosys Plugins
  ☆21Updated 5 years ago
• fossi-foundation / fossi-foundation.github.io
  FOSSi Foundation Website
  ☆18Updated 7 months ago
• google / skywater-pdk-libs-sky130_fd_sc_hd
  "High density" digital standard cells for SKY130 provided by SkyWater.
  ☆16Updated 2 years ago
• SanDisk-Open-Source / riscv-fw-infrastructure
  Firmware infrastructure, contain RTOS Abstraction Layer, demos and more...
  ☆52Updated 3 years ago
• waviousllc / wav-slink-hw
  An Open Source Link Protocol and Controller
  ☆27Updated 3 years ago
• amromanov / vmodel
  Vmodel toolbox repository
  ☆14Updated 9 years ago
• clothbot / Alliance-VLSI-CAD-System
  Git repository to manage the fixes I need to make to the alliance-5.0-20090901 source for Mac OS X compiles.
  ☆16Updated 14 years ago
• SymbiFlow / vtr-verilog-to-routing
  SymbiFlow WIP changes for Verilog to Routing -- Open Source CAD Flow for FPGA Research
  ☆37Updated 8 months ago
• OpenCAPI / OpenCAPI3.0_Client_RefDesign
  An example OpenCAPI 3.0 FPGA reference design for accelerator endpoint development
  ☆13Updated 2 years ago
• pulp-platform / trace_debugger
  Capture retired instructions of a RISC-V Core and compress them to a sequence of packets.
  ☆19Updated last year
• hadirkhan10 / caravel_ibtida_soc
  ☆10Updated 4 years ago
• warclab / dyract
  DyRACT Open Source Repository
  ☆16Updated 9 years ago
• openrisc / or1ksim
  The OpenRISC 1000 architectural simulator
  ☆74Updated 3 weeks ago
• YosysHQ / yosys-bigsim
  A collection of big designs to run post-synthesis simulations with yosys
  ☆49Updated 9 years ago
• lowRISC / lowrisc-fpga
  Untethered (stand-alone) FPGA implementation of the lowRISC SoC
  ☆55Updated 5 years ago
• SymbiFlow / nextpnr
  nextpnr portable FPGA place and route tool
  ☆20Updated 8 months ago
• Qucs / qucs-help
  Qucs-Help documentation
  ☆11Updated 6 years ago
• lowRISC / lowrisc-toolchains
  UNSUPPORTED INTERNAL toolchain builds
  ☆39Updated last week
• jck / uhdl
  Utilities for MyHDL
  ☆18Updated last year
• riscv / riscv-test-env
  ☆46Updated last week
• scale-lab / PVTsensors
  Designs for Process-Voltage-Temperature (PVT) Sensors with MCU
  ☆22Updated 5 years ago
• libresilicon / coriolis
  autorouter forked from https://www-soc.lip6.fr/git/coriolis.git
  ☆15Updated 6 years ago
• rbkettlewell / trollstigen-fpga
  Open source fpga project leveraging vtr CAD flow.
  ☆26Updated 2 years ago
• litex-hub / zephyr-on-litex-vexriscv
  ☆12Updated 8 months ago
• terpstra / opa
  Open Processor Architecture
  ☆26Updated 9 years ago
• PacoReinaCampo / SoC-RISCV
  System on Chip with RISCV-32 / RISCV-64 / RISCV-128
  ☆23Updated last week
• firesim / firechip
  Top-Level Project for Firebox SoC, consisting of Rocket, BOOM, and peripherals (e.g. Ethernet NIC). This is the default target generator …
  ☆56Updated 5 years ago