google / yaricv32

Related projects ⓘ

Alternatives and complementary repositories for yaricv32

• google / bbcpu
  ☆16Updated 6 years ago
• google / globalfoundries-pdk-libs-gf180mcu_fd_bd_sram
  SRAM build space for the GF180MCU provided by GlobalFoundries.
  ☆10Updated 2 years ago
• google / verilogpp
  ☆17Updated 5 months ago
• google / skywater-pdk-libs-sky130_fd_sc_hd
  "High density" digital standard cells for SKY130 provided by SkyWater.
  ☆15Updated last year
• pulp-platform / axi_node
  AXI X-Bar
  ☆19Updated 4 years ago
• franzflasch / leiwand_rv32
  RISC-V RV32I CPU written in verilog
  ☆10Updated 4 years ago
• google / globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0
  9 track standard cells for GF180MCU provided by GlobalFoundries.
  ☆16Updated last year
• wallento / wb2axi
  Wishbone to ARM AMBA 4 AXI
  ☆13Updated 5 years ago
• PacoReinaCampo / vhdl2verilog
  Hardware Description Language Translator
  ☆15Updated 3 weeks ago
• google / skywater-pdk-actions
  GitHub Actions for usage with Google's 130nm manufacturable PDK for SkyWater Technology found @ https://github.com/google/skywater-pdk
  ☆12Updated 3 years ago
• PacoReinaCampo / SoC-RISCV
  System on Chip with RISCV-32 / RISCV-64 / RISCV-128
  ☆20Updated 3 weeks ago
• iammituraj / FIFOs
  Register-based and RAM-based FIFOs designed in Verilog/System Verilog.
  ☆14Updated 3 months ago
• chipsalliance / f4pga-sdf-timing
  Python library for working Standard Delay Format (SDF) Timing Annotation files.
  ☆28Updated 4 months ago
• fabriziotappero / opencores-scraper
  few python scripts to clone all IP cores from opencores.org
  ☆18Updated 10 months ago
• SLink-Protocol / S-Link
  An Open Source Link Protocol and Controller
  ☆23Updated 3 years ago
• gjlies / configgpgpu
  A configurable general purpose graphics processing unit for
  ☆11Updated 5 years ago
• RPG-7 / HGA101_GPU
  ☆16Updated 3 years ago
• RoaLogic / adv_dbg_if
  Universal Advanced JTAG Debug Interface
  ☆17Updated 6 months ago
• aliyun / alibabacloud-fpga
  ☆17Updated 5 years ago
• aomtoku / hdmi-ts
  hdmi-ts Project
  ☆13Updated 7 years ago
• diamantopoulos / memluv
  An HLS-synthesizable Dynamic Memory Manager for FPGAs
  ☆10Updated 2 years ago
• www-asics-ws / usb1_device
  USB 1.1 Device IP Core
  ☆18Updated 7 years ago
• zhemao / riscv-dma
  A DMA Controller for RISCV CPUs
  ☆14Updated 9 years ago
• pulp-platform / hier-icache
  ☆11Updated 8 months ago
• openhwgroup / cv32e41p
  4 stage, in-order, secure RISC-V core based on the CV32E40P with Zfinx and Zce ISA extentions
  ☆26Updated last year
• freecores / theia_gpu
  Theia: ray graphic processing unit
  ☆19Updated 10 years ago
• Corey-Maler / simple_SoC
  Small and simple, primitive SoC with GPU, CPU, RAM, GPIO
  ☆12Updated 7 years ago
• microsoft / Elastic-Silicon-Interconnect
  ESI is an FPGA connectivity system. It uses typed, latency-insensitive on-chip connections between ESI-enabled modules. It also bridges o…
  ☆33Updated 4 years ago
• freecores / ahb_master
  Generic AHB master stub
  ☆10Updated 10 years ago