Alternatives and similar repositories for 2D-Image-Filtering-on-FPGA:

Users that are interested in 2D-Image-Filtering-on-FPGA are comparing it to the libraries listed below

• warclab / dyract
  DyRACT Open Source Repository
  ☆16Updated 8 years ago
• ZipCPU / videozip
  A ZipCPU SoC for the Nexys Video board supporting video functionality
  ☆17Updated 4 months ago
• t-crest / reconfig
  Hardware and script files related to dynamic partial reconfiguration
  ☆9Updated 7 years ago
• freecores / xge_mac
  Ethernet 10GE MAC
  ☆45Updated 10 years ago
• ayzk / Simulator_CPU
  Pipeline CPU of MIPS architecture with L1 Data Cache by Verilog
  ☆21Updated 4 years ago
• Poofjunior / fpga_fast_serial_sort
  a parallel sorting algorithm implemented in hardware that sorts data in linear time as it arrives serially
  ☆39Updated 9 years ago
• PacoReinaCampo / MPSoC-NoC
  Network on Chip for MPSoC
  ☆26Updated last week
• ikwzm / SECURE_HASH
  SHA-1,SHA-256,SHA-512 Secure Hash Generator written in VHDL(RTL) for FPGA(Xilinx and Altera).
  ☆11Updated 7 years ago
• ash-aldujaili / spatial-filter-hdl
  High Throughput Image Filters on FPGAs
  ☆13Updated 7 years ago
• andrewattwood / fuserisc
  Dual RISC-V DISC with integrated eFPGA
  ☆16Updated 3 years ago
• andrewandrepowell / zybo_petalinux_video_hls
  Demonstration of a video processing design for the Digilent Zybo, using Web Camera for input and VGA interface for output.
  ☆25Updated 8 years ago
• Digilent / Zybo-Z7-20-base-linux
  ☆16Updated 2 years ago
• hukenovs / tcl_for_fpga
  TCL scripts for FPGA (Xilinx)
  ☆31Updated 2 years ago
• freecores / video_stream_scaler
  Video Stream Scaler
  ☆40Updated 10 years ago
• tukl-msd / LSTM-PYNQ
  ☆29Updated 7 years ago
• ultraembedded / altor32
  AltOr32 - Alternative Lightweight OpenRisc CPU
  ☆12Updated 9 years ago
• Cognoscan / AxiCores
  AXI4-Compatible Verilog Cores, along with some helper modules.
  ☆16Updated 5 years ago
• ztgao / ConvNN_FPGA_Accelerator
  ☆14Updated 9 years ago
• EECScat / MMCM_Dynamic-Reconfiguration
  This repository provides a method to dynamically change the clock output frequency, phase shift, and duty cycle of the mixed-mode clock m…
  ☆11Updated 4 years ago
• lp6m / ImageDetectionHW2
  HOG + SVM on FPGA
  ☆26Updated 4 years ago
• parimalp / Advanced-Embedded-System-Design-Flow-on-Zynq
  ☆18Updated 6 years ago
• nakultirumalai / VLSIPlacement
  Code for new techniques of VLSI placement
  ☆12Updated 11 years ago
• eliaskousk / parallella-riscv
  RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards
  ☆101Updated 6 years ago
• leonardopennino / PYNQ-Z2-IMPROC
  IMAGE PROCESSING ON XILINX PYNQ Z2 (CANNY, SOBEL)
  ☆26Updated 3 years ago
• ZipCPU / axidmacheck
  AXI DMA Check: A utility to measure DMA speeds in simulation
  ☆14Updated 2 months ago
• ress / VHDL-Pong
  A Pong game written in VHDL using a Xilinx Spartan 3 board. VGA + PS/2 Keyboard + Sound support.
  ☆20Updated 9 years ago
• bgottschall / reloc
  Designing Relocatable FPGA Partitions with Vivado Design Suite
  ☆10Updated 6 years ago
• sopynq / huffman-encoding-core
  Huffman encoding core (Vivado HLS Project)
  ☆12Updated 5 years ago
• leos313 / DOOM_FPGA
  Accelerating a Classic 3D Video Game (The DOOM) on Heterogeneous Reconfigurable MPSoCs
  ☆16Updated 4 years ago
• silverjam / VHDL
  VHDL Samples
  ☆67Updated 12 years ago