jonasjj / awesome-vhdl

Related projects ⓘ

Alternatives and complementary repositories for awesome-vhdl

• kevinpt / hdlparse
  Simple parser for extracting VHDL documentation
  ☆70Updated 4 months ago
• VHDL / pyVHDLModel
  An abstract language model of VHDL written in Python.
  ☆50Updated this week
• olofk / wb_intercon
  Wishbone interconnect utilities
  ☆37Updated 6 months ago
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆39Updated 4 years ago
• OSVVM / Documentation
  OSVVM Documentation
  ☆30Updated last month
• suoto / fpga_cores
  ☆32Updated last year
• dpretet / svut
  SVUT is a simple framework to create Verilog/SystemVerilog unit tests. Just focus on your tests!
  ☆70Updated last month
• paulscherrerinstitute / psi_common
  Common elements for FPGA Design (FIFOs, RAMs, etc.)
  ☆30Updated 2 months ago
• ZipCPU / wbi2c
  Wishbone controlled I2C controllers
  ☆44Updated last week
• hdl-registers / hdl-registers
  An open-source HDL register code generator fast enough to run in real time.
  ☆37Updated this week
• alexforencich / cocotbext-uart
  UART models for cocotb
  ☆23Updated last year
• ghdl / ghdl-cosim
  Documentation with code examples about interfacing VHDL with foreign languages and tools through GHDL
  ☆46Updated this week
• SymbiFlow / sphinxcontrib-hdl-diagrams
  Sphinx Extension which generates various types of diagrams from Verilog code.
  ☆55Updated last year
• schang412 / cocotbext-spi
  ☆20Updated 3 weeks ago
• someone755 / ddr3-controller
  A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs
  ☆62Updated last year
• lnis-uofu / SOFA
  SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA
  ☆134Updated last year
• ultraembedded / core_dvi_framebuffer
  Minimal DVI / HDMI Framebuffer
  ☆76Updated 4 years ago
• hdl-util / sdram-controller
  Generic FPGA SDRAM controller, originally made for AS4C4M16SA
  ☆79Updated 4 years ago
• FPGA-Systems / drawio-hdl-builder
  Drawio => VHDL and Verilog
  ☆51Updated last year
• SystemRDL / PeakRDL-html
  Generate address space documentation HTML from compiled SystemRDL input
  ☆47Updated 2 months ago
• FPHDL / fphdl
  VHDL-2008 Support Library
  ☆56Updated 8 years ago
• tmeissner / cryptocores
  cryptography ip-cores in vhdl / verilog
  ☆40Updated 3 years ago
• amaranth-farm / amlib
  assorted library of utility cores for amaranth HDL
  ☆81Updated 2 months ago
• slaclab / ruckus
  Vivado build system
  ☆71Updated this week
• wavedrom / cli
  CLI for WaveDrom
  ☆61Updated 9 months ago
• ultraembedded / core_ft60x_axi
  FTDI FT600 SuperSpeed USB3.0 to AXI bus master
  ☆87Updated 4 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆54Updated last year
• hdl-modules / hdl-modules
  A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
  ☆108Updated this week
• OSVVM / OsvvmLibraries
  Start here. Includes all other OSVVM libraries as submodules: Utility, Common, Verification Component, and Script.
  ☆52Updated last week
• wavedrom / vcd-samples
  sample VCD files
  ☆36Updated 9 months ago