An 8b10b decoder and encoder in logic in VHDL
☆26Apr 12, 2021Updated 5 years ago
Alternatives and similar repositories for 8b10b_VHDL
Users that are interested in 8b10b_VHDL are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆16May 6, 2026Updated last month
- Python module for 8B10B encoding and decoding☆12Jul 25, 2023Updated 2 years ago
- ☆11Sep 26, 2021Updated 4 years ago
- Creates a .SVG symbol from a VHDL entity. Colors and some other properties can be adjusted.☆13Jun 30, 2023Updated 2 years ago
- 8b/10b is a line code that maps 8-bit words to 10-bit symbols to achieve DC-balance and bounded disparity, which is used for telecommunic…☆12Jun 8, 2021Updated 5 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- ☆12May 29, 2020Updated 6 years ago
- ☆18Sep 16, 2020Updated 5 years ago
- ARTICo³ - Dynamic and Partially Reconfigurable Architecture for Run-Time Adaptive, High Performance Embedded Computing☆12Sep 10, 2024Updated last year
- Client Driver for this HDL module: https://github.com/analogdevicesinc/hdl/tree/master/library/axi_dmac☆17Mar 10, 2022Updated 4 years ago
- R2FFT is a fully synthesizable verilog module for doing the FFT on an FPGA or ASIC.☆22Apr 30, 2019Updated 7 years ago
- 1G eth UDP / IP Stack☆10Jul 17, 2014Updated 11 years ago
- uvm_starter is a simple template for starting uvm projects☆12Feb 11, 2025Updated last year
- A user-space port of the altera-stapl driver from the linux kernel☆14Jan 10, 2023Updated 3 years ago
- ☆13Nov 29, 2025Updated 6 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- JavaScript action for users to easily install tip/nightly GHDL assets in GitHub Actions workflows☆16Jan 12, 2025Updated last year
- A flexible and scalable development platform for modern FPGA projects.☆44Updated this week
- Verilog RTL Design☆50Sep 4, 2021Updated 4 years ago
- ☆25Updated this week
- SDRAM controller for MIPSfpga+ system☆24Oct 30, 2020Updated 5 years ago
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆33Aug 20, 2022Updated 3 years ago
- SRAM build space for SKY130 provided by SkyWater.☆25Oct 20, 2021Updated 4 years ago
- Analog and power building blocks for sky130 pdk☆22Mar 3, 2021Updated 5 years ago
- A multi-threaded microprocessor interleaving as minimum three threads, which is pin-to-pin compatible with pulpino riscy cores☆19Jul 4, 2025Updated 11 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- USB 1.1 Device IP Core☆21Oct 1, 2017Updated 8 years ago
- VHDL description of the custom Demolicious GPU. Built during a single semester at NTNU☆39Jan 31, 2017Updated 9 years ago
- PowerShell tools for managing a Hyper-V guarded fabric and shielded virtual machines☆18Sep 20, 2019Updated 6 years ago
- DMA core compatible with AHB3-Lite☆13Mar 30, 2019Updated 7 years ago
- Quad SPI Flash XIP Controller with a direct mapped cache☆12Dec 9, 2020Updated 5 years ago
- AHB3-Lite to Wishbone Bridge☆13Mar 26, 2019Updated 7 years ago
- Mini-Box DCDC-USB, Intelligent buck-boost DC-DC converter with USB interface☆22Dec 9, 2023Updated 2 years ago
- ☆22Feb 3, 2026Updated 4 months ago
- Create Draw.io (diagrams.net) drawings, with Python☆14Jul 18, 2023Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Modding the LOOΠΔ light stick with a custom PCB/firmware, rechargeable battery and a companion Android app for wireless control.☆13Sep 16, 2022Updated 3 years ago
- Search-based test generation toolbox written in Python☆20Jun 10, 2026Updated last week
- VHDL functional blocks with their simulations and test sequences☆20Updated this week
- Reverse engineered source code of Packet11 driver (802.11 Packet Injection for Windows).☆12May 15, 2020Updated 6 years ago
- ☆15Mar 28, 2026Updated 2 months ago
- ☆13Sep 27, 2022Updated 3 years ago
- Examples using the Cyclone V SoC chip☆115May 22, 2019Updated 7 years ago