Alternatives and similar repositories for adi_dmac_iio_client

Users that are interested in adi_dmac_iio_client are comparing it to the libraries listed below

• MicroPhase / antsdr_standalone
  Standalone application based on ADI hdl and no_OS for ANTSDR.
  ☆22Updated 8 months ago
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆56Updated 2 years ago
• fcayci / vhdl-axis-uart
  UART to AXI Stream interface written in VHDL
  ☆17Updated 3 years ago
• catkira / complex_multiplier
  HDL code for a complex multiplier with AXI stream Interface
  ☆13Updated 2 years ago
• jacobfeder / axisfifo
  Zynq SoC Linux kernel driver for Xilinx AXI-Stream FIFO IP
  ☆57Updated 10 months ago
• BBN-Q / VHDL-JESD204b
  JESD204b modules in VHDL
  ☆30Updated 6 years ago
• patocarr / axi-traffic-gen
  File editor for the Xilinx AXI Traffic Generator IP
  ☆16Updated last year
• m-labs / jesd204b
  JESD204B core for Migen/MiSoC
  ☆35Updated 4 years ago
• analogdevicesinc / HighSpeedConverterToolbox
  MATLAB toolbox for ADI high speed converter products
  ☆27Updated last month
• chinkwo / FPGA-multiboot
  通过SPI协议实现FPGA multiboot在线升级功能
  ☆11Updated 7 years ago
• Architech-Silica / Zynq-Configuration-Controller
  A configuration controller solution allowing a Zynq device to configure downstream FPGAs
  ☆14Updated 10 years ago
• analogdevicesinc / testbenches
  Testbenches for HDL projects
  ☆22Updated last week
• coralhu123 / KC705-AD9371
  The implementation of AD9371 on KC705
  ☆20Updated 6 months ago
• Teddy-van-Jerry / sdr-psk-fpga
  Dual-Mode PSK Transceiver on SDR With FPGA
  ☆48Updated last year
• crboth / LDPC_Decoder
  Low Density Parity Check Decoder
  ☆18Updated 9 years ago
• bioern / turbo_decoder
  LTE Turbo Decoder using BCJR algorithm
  ☆10Updated 7 years ago
• analogdevicesinc / TransceiverToolbox
  MATLAB toolbox for ADI transceiver products
  ☆63Updated last month
• Architech-Silica / Designing-a-Custom-AXI-Slave-Peripheral
  A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools
  ☆41Updated 7 years ago
• hukenovs / adc_configurator
  ADC configurator to 7-series Xilinx FPGA (has parameters: NCHAN, SERDES MODE, SDR/DDR, DATA WIDTH, DEPTH and so on)
  ☆13Updated 7 years ago
• freecores / dvb_s2_ldpc_decoder
  DVB-S2 LDPC Decoder
  ☆28Updated 11 years ago
• ZipCPU / interpolation
  Digital Interpolation Techniques Applied to Digital Signal Processing
  ☆67Updated last year
• Grootzz / AD9361_TX_1MHz_Baseband_800Hz_IF
  A project demonstrate how to config ad9361 to TX mode
  ☆11Updated 7 years ago
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆31Updated 2 years ago
• analogdevicesinc / meta-adi
  This is the Analog Devices Inc. Yocto/OpenEmbedded layer
  ☆46Updated last month
• Grootzz / AD9361_TX_MSK
  A project demonstrate how to config ad9361 to TX mode and how to transmit MSK
  ☆61Updated 6 years ago
• fpgasystems / groundhog
  Groundhog - Serial ATA Host Bus Adapter
  ☆24Updated 7 years ago
• fpga-soc / mil-std-1553b-soc
  development interface mil-std-1553b for system on chip
  ☆23Updated 7 years ago
• zhelnio / ahb_lite_sdram
  SDRAM controller for MIPSfpga+ system
  ☆24Updated 5 years ago
• catkira / CIC
  HDL code for a complex multiplier with AXI stream interface
  ☆16Updated 2 years ago
• coltonshane / SSD_Test
  SSD test project using Zynq Ultrascale+ bare metal NVMe.
  ☆23Updated 4 years ago