Alternatives and similar repositories for zedboard-axi-dma

Users that are interested in zedboard-axi-dma are comparing it to the libraries listed below

• Digilent / Zedboard-DMA

  View on GitHub
  ☆14Sep 19, 2019Updated 6 years ago
• h-nasiri / Zynq-Linux-DMA

  View on GitHub
  DMA enabled Zynq PS-PL communication to implement high throughput data transfer between Linux applications and user IP core.
  ☆41Feb 8, 2017Updated 9 years ago
• fpgadeveloper / microzed-axi-dma

  View on GitHub
  Demonstration of the AXI DMA engine on the MicroZed
  ☆26Feb 26, 2021Updated 4 years ago
• Digilent / Zedboard-OLED

  View on GitHub
  ☆17Jul 28, 2022Updated 3 years ago
• cnberry-zz / altera-linux-pcie-driver

  View on GitHub
  A linux PCIe driver for Altera
  ☆11Oct 9, 2018Updated 7 years ago
• C-L-G / video_timing_generator

  View on GitHub
  标准视频时序生成器
  ☆10Feb 9, 2020Updated 6 years ago
• enjoy-digital / litesata_axiom

  View on GitHub
  ☆13Feb 8, 2021Updated 5 years ago
• Digilent / digilent-vivado-scripts

  View on GitHub
  ☆70Jul 24, 2025Updated 6 months ago
• Architech-Silica / Zynq-Zedboard-Vivado-Workshop

  View on GitHub
  Zynq Workshop for Beginners
  ☆32May 21, 2015Updated 10 years ago
• durellinux / ZedBoard_Linux_DMA_driver

  View on GitHub
  ☆28May 17, 2016Updated 9 years ago
• PetteriAimonen / ebike-controller

  View on GitHub
  Chibios-based ebike controller
  ☆16Jan 26, 2026Updated 2 weeks ago
• Digilent / axi4lite_ip_gen

  View on GitHub
  Generates simple AXI4-lite IP for use in Vivado from register specifications
  ☆15Apr 11, 2025Updated 10 months ago
• Digilent / Genesys-ZU

  View on GitHub
  ☆14Jan 22, 2026Updated 3 weeks ago
• gtortone / libaxidma

  View on GitHub
  C++ library for AXI DMA with direct and scatter-gather support
  ☆13Feb 22, 2022Updated 3 years ago
• byuccl / BYU_PYNQ_PR_Video_Pipeline_Hardware

  View on GitHub
  BYU Pynq PR Video Pipeline Hardware
  ☆13Oct 2, 2025Updated 4 months ago
• bperez77 / xilinx_axidma

  View on GitHub
  A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communicat…
  ☆529Jan 12, 2023Updated 3 years ago
• strath-sdr / rfsoc_studio

  View on GitHub
  The Strathclyde RFSoC Studio Installer for PYNQ.
  ☆36Jan 24, 2023Updated 3 years ago
• fpgadeveloper / ethernet-fmc-processorless

  View on GitHub
  Example designs for using Ethernet FMC without a processor (ie. state machine based)
  ☆34Nov 21, 2024Updated last year
• umaurmi / OPENCL_EXAMPLES_ZEDBOARD

  View on GitHub
  This repository contains a set of examples of opencl code that can run on the zedboard zynq all programmable soc.
  ☆16Jan 13, 2016Updated 10 years ago
• pulp-platform / adv_dbg_if

  View on GitHub
  Advanced Debug Interface
  ☆14Jan 23, 2025Updated last year
• Heng-xiu / implement-CRC-32-in-Verilog

  View on GitHub
  Project in Course named DESIGN AND IMPLEMENTATION OF COMMUNICATION PROTOCOLS in FCU
  ☆14Oct 18, 2014Updated 11 years ago
• bmartini / zynq-axis

  View on GitHub
  Hardware, Linux Driver and Library for the Zynq AXI DMA interface
  ☆104Jul 21, 2018Updated 7 years ago
• ultraembedded / core_dbg_bridge

  View on GitHub
  UART -> AXI Bridge
  ☆70Jul 1, 2021Updated 4 years ago
• lite-david / comet

  View on GitHub
  RISC-V ISA based 32-bit processor written in HLS
  ☆16Nov 7, 2019Updated 6 years ago
• maltanar / fpga-booleanring-bfs

  View on GitHub
  Hybrid BFS on Xilinx Zynq
  ☆18Jun 9, 2015Updated 10 years ago
• slaclab / ruckus

  View on GitHub
  FPGA and Digital ASIC Build System
  ☆81Updated this week
• Xilinx / XilinxCEDStore

  View on GitHub
  This store contains Configurable Example Designs.
  ☆51Jan 28, 2026Updated 2 weeks ago
• Xilinx / embeddedsw

  View on GitHub
  Xilinx Embedded Software (embeddedsw) Development
  ☆1,144Nov 26, 2025Updated 2 months ago
• DynamicDevices / meta-example

  View on GitHub
  Yocto/OpenEmbedded layer showing example recipe
  ☆18Oct 11, 2018Updated 7 years ago
• Digilent / digilent-apps

  View on GitHub
  ☆14Mar 1, 2023Updated 2 years ago
• Kirill888 / parallella-fpga-dummy-io

  View on GitHub
  Sample minimal Vivado project for Parallella FPGA
  ☆45May 15, 2016Updated 9 years ago
• jiafulow / zedboard-guide

  View on GitHub
  ☆49Feb 9, 2016Updated 10 years ago
• k0nze / qemu_zynq_linux_setup

  View on GitHub
  Tutorial on installing QEMU to simulate Zynq Devices with Petalinux
  ☆24Jun 6, 2017Updated 8 years ago
• Xilinx / RFSoC-MTS

  View on GitHub
  A PYNQ overlay demonstrating AMD RFSoC Multi-Tile Synchronization (MTS).
  ☆33Jun 22, 2023Updated 2 years ago
• alexforencich / verilog-axis

  View on GitHub
  Verilog AXI stream components for FPGA implementation
  ☆859Feb 27, 2025Updated 11 months ago
• zao111222333 / spinalhdl-online

  View on GitHub
  ☆24May 6, 2023Updated 2 years ago
• filipamator / adpll

  View on GitHub
  All digital PLL
  ☆28Dec 19, 2017Updated 8 years ago
• lky9620 / Ta-Yo

  View on GitHub
  Self-driving Model Car with RPi
  ☆10Nov 27, 2020Updated 5 years ago
• ucb-bar / fpga-zynq

  View on GitHub
  Support for Rocket Chip on Zynq FPGAs
  ☆415Jan 29, 2019Updated 7 years ago