vipinkmenon / ZynqOLEDLinks
Source code for Zynq OLED controller
☆15Updated 4 years ago
Alternatives and similar repositories for ZynqOLED
Users that are interested in ZynqOLED are comparing it to the libraries listed below
Sorting:
- A 66-order (67 taps) hamming FIR LPF Filter is to be designed with a cutoff frequency of 200 KHZ for a sampling frequency of 1 MHZ☆13Updated 2 years ago
- WM8731 Audio CODEC using Verilog (DE2-115)☆9Updated 5 years ago
- Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images☆60Updated 3 years ago
- AXI4-Stream FIR filter IP☆17Updated 2 years ago
- design of LMS adaptive 4-tap FIR filter using Distributed Arithmetic architecture in verilog☆10Updated 2 years ago
- FIR filter implementation☆26Updated 5 years ago
- Verilog HDL implementation of an ECHO machine and an FIR filter that filters out a specific noise. More details provided in individual fi…☆10Updated 5 years ago
- Implementation of JESD204B Transport Layer & part of Data Link Layer☆36Updated 3 years ago
- This project aims to design an 32-point FFT (Fast Fourier Transform) based DIT (decimation in time) Butterfly Algorithm with multiple clo…☆54Updated last year
- 帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目☆34Updated 3 years ago
- Realtime video processing w/ Gaussian + Sobel Filters targeting Artix-7 FPGA☆26Updated 3 years ago
- Use Verilog to complete the design of various digital circuits, including common interfaces, such as UART, Bluetooth, IIC, AMBA, etc. It …☆27Updated 4 years ago
- Student project for using audio on the DE2-115 FPGA development board.☆27Updated 7 years ago
- FPGA implementation of pose detection with Kalman filter. (verilog)☆35Updated 3 years ago
- ARM中通过APB总线连接的UART模块☆67Updated 5 years ago
- FPGA Technology Exchange Group相关文件管理☆45Updated last month
- Real-time streaming of OV7670 camera via VGA with a 640x480 resolution at 30fps☆62Updated 3 years ago
- I2C Master and Slave☆34Updated 9 years ago
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆64Updated 9 months ago
- The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB…☆60Updated 2 years ago
- OV5640摄像头驱动及TFT屏幕显示☆15Updated 6 years ago
- Step by step tutorial for building CortexM0 SoC☆38Updated 3 years ago
- Pipeline FFT Implementation in Verilog HDL☆119Updated 6 years ago
- A 32-point pipelined Fast Fourier transform processor, using single path delay architecture, and based on radix2-DIF(decimation-in-freque…☆48Updated 5 years ago
- HW JPEG decoder wrapper with AXI-4 DMA☆34Updated 4 years ago
- ☆31Updated 5 years ago
- Hardware Design and Verification of a configurable and parametrized 50th order low-pass FIR filter starting from MATLAB Modeling to Veril…☆24Updated 2 years ago
- fpga跑sobel识别算法☆35Updated 4 years ago
- ☆55Updated 11 months ago
- Must-have verilog systemverilog modules☆36Updated 3 years ago