fanyao / branchspec
Proof of concept code for the BranchSpec exploit.
☆9Updated 2 years ago
Alternatives and similar repositories for branchspec:
Users that are interested in branchspec are comparing it to the libraries listed below
- The artifact for SecSMT paper -- Usenix Security 2022☆27Updated 2 years ago
- Streamline Covert Channel Attack (presented in ASPLOS'21)☆20Updated 4 years ago
- ☆17Updated 2 years ago
- ☆19Updated 2 years ago
- Gem5 implementation of "InvisiSpec", a defense mechanism of speculative execution attacks on cache hierarchy.☆60Updated 4 years ago
- The open-source component of Prime+Scope, published at CCS 2021☆30Updated last year
- CleanupSpec (MICRO-2019)☆17Updated 4 years ago
- ☆35Updated 4 years ago
- Data-centric defense mechanism against Spectre attacks. (DAC'19)☆11Updated 5 years ago
- The code in this project demonstrates 2 novel Spectre-V4 attacks, named as out-of-place Spectre-STL and Spectre-CTL, based on the Specula…☆18Updated last year
- ☆24Updated 2 years ago
- Library for Prime+Probe cache side-channel attacks on L1 and L2☆33Updated 4 years ago
- Hands on with side-channels: a tutorial on covert-channels built using shared CPU resources. Three different covert-channel implementatio…☆44Updated 5 years ago
- This repository provides Pensieve, a security evaluation framework for microarchitectural defenses against speculative execution attacks.☆22Updated last year
- New Cache implementation using Gem5☆13Updated 11 years ago
- Proof-of-concept for I See Dead Micro-Ops transient execution attack☆14Updated 3 years ago
- Reload+Refresh PoC☆14Updated 5 years ago
- MIRAGE (USENIX Security 2021)☆12Updated last year
- ☆11Updated 5 years ago
- Microscope: Enabling Microarchitectural Replay Attacks☆19Updated 4 years ago
- HW interface for memory caches☆26Updated 5 years ago
- ☆11Updated 2 years ago
- ☆16Updated last year
- Open-source release of "Last-Level Cache Side-Channel Attacks Are Feasible in the Modern Public Cloud" (ASPLOS '24)☆22Updated 3 weeks ago
- Microarchitectural attack development frameworks for prototyping attacks in native code (C, C++, ASM) and in the browser☆61Updated 2 years ago
- Medusa Repository: Transynther tool and Medusa Attack☆20Updated 4 years ago
- This repository contains source code and experimental data of multiple cache side-channel attacks on Intel x86 architecture.☆51Updated 5 years ago
- A flush-reload side channel attack implementation☆48Updated 3 years ago
- Implementation of flush + reload attack to extract private key from the GnuPG implementation of RSA.☆10Updated 5 years ago
- Test suite containing a reproduction of all major transient-execution attacks in RISC-V and CHERI-RISC-V assembly☆15Updated 3 years ago