vusec / tlbdrLinks
☆17Updated 3 years ago
Alternatives and similar repositories for tlbdr
Users that are interested in tlbdr are comparing it to the libraries listed below
Sorting:
- The code in this project demonstrates 2 novel Spectre-V4 attacks, named as out-of-place Spectre-STL and Spectre-CTL, based on the Specula…☆22Updated 2 years ago
- Proof-of-concept for I See Dead Micro-Ops transient execution attack☆14Updated 4 years ago
- HW interface for memory caches☆28Updated 5 years ago
- Medusa Repository: Transynther tool and Medusa Attack☆23Updated 5 years ago
- Proof-of-concept code for the IEEE S&P 2025 paper "Peek-a-Walk: Leaking Secrets via Page Walk Side Channels"☆30Updated 5 months ago
- Streamline Covert Channel Attack (presented in ASPLOS'21)☆22Updated 4 years ago
- Microarchitectural attack development frameworks for prototyping attacks in native code (C, C++, ASM) and in the browser☆62Updated 3 years ago
- Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)☆74Updated last month
- The artifact for SecSMT paper -- Usenix Security 2022☆30Updated 3 years ago
- The open-source component of Prime+Scope, published at CCS 2021☆36Updated 2 years ago
- ☆47Updated 7 years ago
- ☆17Updated 5 months ago
- ☆16Updated 3 years ago
- ☆13Updated 4 years ago
- Gem5 implementation of "InvisiSpec", a defense mechanism of speculative execution attacks on cache hierarchy.☆61Updated 5 years ago
- Hands on with side-channels: a tutorial on covert-channels built using shared CPU resources. Three different covert-channel implementatio…☆50Updated 6 years ago
- Tool for testing and finding minimal eviction sets☆107Updated 4 years ago
- Security Test Benchmark for Computer Architectures☆21Updated 2 months ago
- Repository of the paper "Reproducing Spectre Attack with gem5, How To Do It Right?"☆18Updated 2 years ago
- This repository provides Pensieve, a security evaluation framework for microarchitectural defenses against speculative execution attacks.☆24Updated last year
- Open-source release of "Last-Level Cache Side-Channel Attacks Are Feasible in the Modern Public Cloud" (ASPLOS '24)☆33Updated 8 months ago
- Implementation for the DIMVA'22 paper "Branch Different - Spectre Attacks on Apple Silicon"☆37Updated 3 years ago
- ☆100Updated last year
- CleanupSpec (MICRO-2019)☆16Updated 5 years ago
- ☆25Updated 2 years ago
- Data-centric defense mechanism against Spectre attacks. (DAC'19)☆11Updated 6 years ago
- Microscope: Enabling Microarchitectural Replay Attacks☆20Updated 5 years ago
- MIRAGE (USENIX Security 2021)☆14Updated 2 years ago
- This repository contains source code and experimental data of multiple cache side-channel attacks on Intel x86 architecture.☆58Updated 6 years ago
- Library for Prime+Probe cache side-channel attacks on L1 and L2☆37Updated 5 years ago