Alternatives and similar repositories for reproduce-spectre-gem5

Users that are interested in reproduce-spectre-gem5 are comparing it to the libraries listed below

• flowyroll / medusa
  Medusa Repository: Transynther tool and Medusa Attack
  ☆23Updated 5 years ago
• libtea / frameworks
  Microarchitectural attack development frameworks for prototyping attacks in native code (C, C++, ASM) and in the browser
  ☆62Updated 3 years ago
• gururaj-s / streamline
  Streamline Covert Channel Attack (presented in ASPLOS'21)
  ☆22Updated 4 years ago
• nepoche / Flush-Reload
  A flush-reload side channel attack implementation
  ☆55Updated 3 years ago
• KULeuven-COSIC / PRIME-SCOPE
  The open-source component of Prime+Scope, published at CCS 2021
  ☆36Updated 2 years ago
• vernamlab / medusa
  Medusa Repository: Transynther tool and Medusa Attack
  ☆19Updated 5 years ago
• ECLab-ITU / Cache-Side-Channel-Attacks
  This repository contains source code and experimental data of multiple cache side-channel attacks on Intel x86 architecture.
  ☆58Updated 6 years ago
• cgvwzq / evsets
  Tool for testing and finding minimal eviction sets
  ☆107Updated 4 years ago
• vusec / tlbdr
  ☆17Updated 3 years ago
• yshalabi / covert-channel-tutorial
  Hands on with side-channels: a tutorial on covert-channels built using shared CPU resources. Three different covert-channel implementatio…
  ☆52Updated 6 years ago
• vusec / xlate
  Code to evaluate XLATE attacks as well existing cache attacks.
  ☆31Updated 7 years ago
• greenlsi / reload_refresh
  Reload+Refresh PoC
  ☆16Updated 5 years ago
• flowyroll / uarchsec
  ☆47Updated 7 years ago
• FxPiGaAo / Hacky-Racer
  ☆17Updated 6 months ago
• mktrm / SecSMT_Artifact
  The artifact for SecSMT paper -- Usenix Security 2022
  ☆30Updated 3 years ago
• cgvwzq / cachequery
  HW interface for memory caches
  ☆28Updated 5 years ago
• Miro-H / CacheSC
  Library for Prime+Probe cache side-channel attacks on L1 and L2
  ☆38Updated 5 years ago
• zzrcxb / LLCFeasible
  Open-source release of "Last-Level Cache Side-Channel Attacks Are Feasible in the Modern Public Cloud" (ASPLOS '24)
  ☆33Updated 9 months ago
• cispa / osiris
  Proof-of-concept implementation for the paper "Osiris: Automated Discovery of Microarchitectural Side Channels" (USENIX Security'21)
  ☆65Updated 7 months ago
• renxida / iseedeaduops-poc
  Proof-of-concept for I See Dead Micro-Ops transient execution attack
  ☆14Updated 4 years ago
• bu-icsg / PHMon
  This repository contains the hardware, software, and OS support for the Programmable Hardware Monitor (PHMon).
  ☆27Updated 5 years ago
• CPU-Security / Spectre-V4-ng
  The code in this project demonstrates 2 novel Spectre-V4 attacks, named as out-of-place Spectre-STL and Spectre-CTL, based on the Specula…
  ☆22Updated 2 years ago
• isec-tugraz / msrevelio
  ☆44Updated 2 years ago
• compsec-snu / difuzz-rtl
  ☆101Updated last year
• cispa / Security-RISC
  Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)
  ☆76Updated 2 months ago
• 0xADE1A1DE / Mastik
  ☆119Updated 3 years ago
• Trustworthy-and-Responsible-AI-Lab / Mastik
  GitHub (mirror) repository for the Mastik toolkit, written by Yuval Yarom https://cs.adelaide.edu.au/~yval/Mastik/
  ☆42Updated 6 years ago
• vul337 / cfi-eval
  ☆22Updated 5 years ago
• PittECEArch / AdversarialPrefetch
  ☆20Updated 3 years ago
• comparch-security / cpu-sec-bench
  Security Test Benchmark for Computer Architectures
  ☆21Updated 3 months ago