PittECEArch / AdversarialPrefetch
☆19Updated 2 years ago
Alternatives and similar repositories for AdversarialPrefetch:
Users that are interested in AdversarialPrefetch are comparing it to the libraries listed below
- Streamline Covert Channel Attack (presented in ASPLOS'21)☆19Updated 4 years ago
- The artifact for SecSMT paper -- Usenix Security 2022☆27Updated 2 years ago
- Proof of concept code for the BranchSpec exploit.☆9Updated 2 years ago
- The open-source component of Prime+Scope, published at CCS 2021☆30Updated last year
- Reload+Refresh PoC☆14Updated 5 years ago
- ☆23Updated 2 years ago
- CleanupSpec (MICRO-2019)☆17Updated 4 years ago
- MIRAGE (USENIX Security 2021)☆12Updated last year
- Gem5 implementation of "InvisiSpec", a defense mechanism of speculative execution attacks on cache hierarchy.☆59Updated 4 years ago
- ☆11Updated 2 years ago
- Library for Prime+Probe cache side-channel attacks on L1 and L2☆30Updated 4 years ago
- Code for the CCS 2022 paper "Microarchitectural Leakage Templates and Their Application to Cache-Based Side Channels".☆12Updated 2 years ago
- Hands on with side-channels: a tutorial on covert-channels built using shared CPU resources. Three different covert-channel implementatio…☆44Updated 5 years ago
- ☆18Updated 2 years ago
- ☆11Updated 5 years ago
- New Cache implementation using Gem5☆13Updated 10 years ago
- ☆34Updated 4 years ago
- NVLeak: Off-Chip Side-Channel Attacks via Non-Volatile Memory Systems [USENIX Security '23]☆17Updated 2 years ago
- ☆18Updated 6 years ago
- Data-centric defense mechanism against Spectre attacks. (DAC'19)☆11Updated 5 years ago
- ☆80Updated 9 months ago
- The code in this project demonstrates 2 novel Spectre-V4 attacks, named as out-of-place Spectre-STL and Spectre-CTL, based on the Specula…☆18Updated last year
- ☆12Updated 4 years ago
- Security Test Benchmark for Computer Architectures☆20Updated last month
- Medusa Repository: Transynther tool and Medusa Attack☆20Updated 4 years ago
- HW interface for memory caches☆26Updated 4 years ago
- ☆16Updated last year
- Proof-of-concept for I See Dead Micro-Ops transient execution attack☆14Updated 3 years ago
- Microscope: Enabling Microarchitectural Replay Attacks☆19Updated 4 years ago
- A behavioural cache model for analysing the cache behaviour under side-channel attack.☆22Updated 5 months ago