SPICE netlist visualizer
☆93Jun 28, 2026Updated 3 weeks ago
Alternatives and similar repositories for netlist-viewer
Users that are interested in netlist-viewer are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- SPICE Netlist Datasets: https://symbench.github.io/spice-datasets/☆40Oct 10, 2023Updated 2 years ago
- ☆124Jun 22, 2026Updated last month
- This repository hosts the information of SPICEPilot: a training free LLM data-augmentation, new bench marking and future road-map.☆42Apr 2, 2026Updated 3 months ago
- Convert hand-drawn electrical circuit diagrams to netlists. CircuitSense can be thought of as the equivalent of handwriting recognition f…☆20Feb 12, 2018Updated 8 years ago
- acst - Analog Circuit Synthesis Tool☆21Jan 15, 2022Updated 4 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- RPHAX provides a quick automation flow to develop and prototype hardware accelerators on Xilinx FPGAs. Currently, the framework has suppo…☆21Feb 25, 2023Updated 3 years ago
- A repository for academic works on RTL generation and Analog circuit generation based on LLM☆21Jul 18, 2026Updated last week
- An FPGA design for simulating biological neurons☆19Jul 5, 2024Updated 2 years ago
- Study notes and tutorial for xilinx hls☆20Jul 22, 2021Updated 5 years ago
- A modular hardware abstraction library☆55Updated this week
- An HBM FPGA based SpMV Accelerator☆19Aug 29, 2024Updated last year
- A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy an…☆484Updated this week
- [AAAI 2025 Oral] AnalogCoder: Analog Circuit Design via Training-Free Code Generation☆185Feb 22, 2026Updated 5 months ago
- Multimodal-LLM Based AI Agent for Schematic Generation of Analog Circuit☆33Oct 20, 2025Updated 9 months ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- SPICE for the 21st Century☆37Dec 13, 2022Updated 3 years ago
- A browser-based SPICE circuit simulator☆173Apr 7, 2026Updated 3 months ago
- cpp parser for reading a VCD (value change dump) file☆10Jul 15, 2013Updated 13 years ago
- An automatic schematic generation tool which generates schematics from a SPICE netlist, usually of output from qflow.☆31Oct 25, 2020Updated 5 years ago
- ☆49Dec 3, 2025Updated 7 months ago
- Netlist API (and more) for EDA flow development☆150Updated this week
- Synthesiser for Asynchronous Verilog Language☆20Oct 29, 2014Updated 11 years ago
- Graphical user interface for circuit simulation on GNU/Linux using ngspice☆17Sep 24, 2016Updated 9 years ago
- Simulate ngSpice netlist on Web☆16Oct 20, 2016Updated 9 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- A hand-drawn schematic sketch recognizer and converter. Three-Step pipeline: Component detection using traditional image processing; Comp…☆65Feb 20, 2025Updated last year
- draws an SVG schematic from a JSON netlist☆809Jan 25, 2024Updated 2 years ago
- A Lean-embedded framework to verify Verilog modules☆15Jul 3, 2026Updated 3 weeks ago
- Python bindings for controlling MPI probe stations☆11Jul 16, 2026Updated last week
- spice3f5☆21Mar 13, 2016Updated 10 years ago
- A compact, configurable RISC-V core☆13Jul 31, 2025Updated 11 months ago
- Systolic Three Matrix Multiplier for Graph Convolutional Networks using High Level Synthesis☆24Jul 29, 2022Updated 3 years ago
- Convert hand-drawn circuit to computer understandable circuit using Machine Learning☆10Feb 3, 2018Updated 8 years ago
- A standalone structural (gate-level) verilog parser☆41Jul 16, 2026Updated last week
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- JDigitalSimulator is a plattform independend Electronic Design Automation software entirely build in Java.☆15Feb 14, 2024Updated 2 years ago
- Digital Logic Circuit Simulator written in Java☆12May 14, 2026Updated 2 months ago
- An interactive digital logic simulator with verilog support (Yosys)☆28Apr 2, 2026Updated 3 months ago
- Convert Fritzing XML netlist to KiCAD netlist☆21May 22, 2017Updated 9 years ago
- XicTools: Xic graphical editor, WRspice circuit simulator, and accessories. for electronic design.☆181Jun 2, 2026Updated last month
- ☆87Oct 29, 2025Updated 8 months ago
- A Formal Verification Methodology to lower the adoption barriers for Formal Verification of ASIC and FPGA designs in the Space sector (th…☆24Jun 29, 2026Updated 3 weeks ago