Alternatives and similar repositories for netlist-viewer

Users that are interested in netlist-viewer are comparing it to the libraries listed below

• Qucs / ADMS
  ADMS is a code generator for some of Verilog-A
  ☆101Updated 2 years ago
• RTimothyEdwards / netgen
  Netgen complete LVS tool for comparing SPICE or verilog netlists
  ☆121Updated 2 months ago
• wrcad / xictools
  XicTools: Xic graphical editor, WRspice circuit simulator, and accessories. for electronic design.
  ☆171Updated this week
• ACMmodel / MOSFET_model
  A simple MOSFET model with only 5-DC-parameters for circuit simulation
  ☆45Updated 3 weeks ago
• lip6 / coriolis
  Coriolis VLSI EDA Tool (LIP6)
  ☆69Updated last week
• Isotel / mixedsim
  Hardware Design Tool - Mixed Signal Simulation with Verilog
  ☆80Updated 7 months ago
• bluecheetah / bag
  BAG framework
  ☆41Updated last year
• najaeda / naja
  Structural Netlist API (and more) for EDA post synthesis flow development
  ☆112Updated this week
• RTimothyEdwards / qrouter
  Qrouter detail router for digital ASIC designs
  ☆56Updated 3 months ago
• RTimothyEdwards / XCircuit
  XCircuit circuit drawing and schematic capture tool
  ☆123Updated 3 months ago
• gmagno / spyci
  A tiny Python package to parse spice raw data files.
  ☆53Updated 2 years ago
• Nic30 / d3-wave
  D3.js based wave (signal) visualizer
  ☆63Updated last year
• DDD-FIT-CTU / CMOS-SPICE-Model-Collections
  MOSIS MPW Test Data and SPICE Models Collections
  ☆37Updated 5 years ago
• ngspice / ngspice
  ☆174Updated last year
• dan-fritchman / Hdl21
  Hardware Description Library
  ☆81Updated 3 months ago
• aidangoettsch / asg
  An automatic schematic generation tool which generates schematics from a SPICE netlist, usually of output from qflow.
  ☆25Updated 4 years ago
• cirosantilli / vcdvcd
  Python Verilog value change dump (VCD) parser library + the nifty vcdcat VCD command line pretty printer.
  ☆61Updated 2 months ago
• idea-fasoc / fasoc
  ☆55Updated last year
• LaurentCabaret / pyVhdl2Sch
  pyVhdl2sch is a python based VHDL to (pdf) schematic converter
  ☆32Updated 5 years ago
• iic-jku / osic-multitool
  JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.
  ☆67Updated 4 months ago
• IHP-GmbH / IHP-Open-DesignLib
  Open source designs developed with IHP 130nm BiCMOS Open Source PDK. Documentation at https://ihp-open-ip.readthedocs.io/en/latest/
  ☆54Updated 4 months ago
• tilk / yosys2digitaljs
  Export netlists from Yosys to DigitalJS
  ☆51Updated last year
• USCPOSH / AMS_KGD
  A repository for Known Good Designs (KGDs). Does not contain any design files with NDA-sensitive information.
  ☆36Updated 4 years ago
• OSVVM / OsvvmLibraries
  Start here. Includes all other OSVVM libraries as submodules: Utility, Common, Verification Component, and Script.
  ☆64Updated 3 weeks ago
• bmpenuelas / waveform-render-vscode
  Render waveforms inside VSCode with WaveDrom
  ☆37Updated 3 months ago
• mbalestrini / gdsiistl
  Converts GDSII files to STL files.
  ☆37Updated last year
• skuep / GDS3D
  Fork from https://sourceforge.net/projects/gds3d
  ☆68Updated last year
• eskiyerli / revedaRelease
  This repository is for (pre-)release versions of the Revolution EDA.
  ☆42Updated 2 weeks ago
• westonb / open-pmic
  A current mode buck converter on the SKY130 PDK
  ☆27Updated 4 years ago
• os-fpga / FOEDAG
  Framework Open EDA Gui
  ☆68Updated 7 months ago