teknohog / rautanoppa

Related projects: ⓘ

• OpenCAPI / omi_device_ice
  An example OMI Device FPGA with 2 DDR4 memory ports
  ☆15Updated last year
• gsomlo / yoloRISC
  A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga
  ☆24Updated 5 years ago
• ZipCPU / zbasic
  A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
  ☆42Updated last year
• embecosm / chiphack
  Repository and Wiki for Chip Hack events.
  ☆50Updated 3 years ago
• betrusted-io / gateware
  IP submodules, formatted for easier CI integration
  ☆27Updated 9 months ago
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆34Updated 2 years ago
• marsohod4you / Amber-Marsohod2
  Port of Amber ARM Core project to Marsohod2 platform
  ☆12Updated 4 years ago
• Wren6991 / ChristmasSoC
  Dual-core RISC-V SoC with JTAG, atomics, SDRAM
  ☆24Updated 2 years ago
• riscv / configuration-structure
  RISC-V Configuration Structure
  ☆35Updated last week
• ZipCPU / wbfmtx
  A wishbone controlled FM transmitter hack
  ☆21Updated 8 months ago
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆54Updated last year
• mmicko / enigmaFPGA
  Enigma in FPGA
  ☆25Updated 5 years ago
• tommythorn / yari
  YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includ…
  ☆43Updated 5 years ago
• ultraembedded / riscv_sbc
  A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.
  ☆26Updated 4 years ago
• daveshah1 / SNES_MiSTer_ulx3s
  SNES for MiSTer
  ☆15Updated 3 years ago
• ZipCPU / dbgbus
  A collection of debugging busses developed and presented at zipcpu.com
  ☆33Updated 8 months ago
• freecores / ps2
  PS2 interface
  ☆17Updated 6 years ago
• westerndigitalcorporation / swerv_eh1_fpga
  FPGA reference design for the the Swerv EH1 Core
  ☆65Updated 4 years ago
• veripool / dinotrace
  Simulation VCD waveform viewer, using old Motif UI
  ☆24Updated last year
• freecores / sparc64soc
  OpenSPARC-based SoC
  ☆55Updated 10 years ago
• f4pga / prjxray-db
  Project X-Ray Database: XC7 Series
  ☆63Updated 2 years ago
• mattvenn / understanding-tinyfpga-bootloader
  understanding the tinyfpga bootloader
  ☆24Updated 6 years ago
• ZipCPU / s6soc
  CMod-S6 SoC
  ☆35Updated 6 years ago
• linuxbest / lzs
  an open source lzs hardware & software
  ☆12Updated 11 years ago
• GuzTech / shdl6800
  shdl6800: A 6800 processor written in SpinalHDL
  ☆25Updated 4 years ago
• ZipCPU / zipversa
  A Versa Board implementation using the AutoFPGA/ZipCPU infrastructure
  ☆13Updated 4 years ago
• matt-kimball / toygpu
  A simple GPU on a TinyFPGA BX
  ☆80Updated 6 years ago
• steveicarus / simbus
  Icarus SIMBUS
  ☆17Updated 4 years ago
• OpenPOWERFoundation / a2o
  The A2O core was a follow-on to A2I, written in Verilog, and supported a lower thread count than A2I, but higher performance per thread, …
  ☆42Updated 4 months ago
• pepijndevos / seqpu
  A bit-serial CPU
  ☆18Updated 4 years ago