tmatsuya / i2c_edidLinks
I2C ROM for EDID (Extended Display Identification Data) on FPGAs
☆22Updated 9 years ago
Alternatives and similar repositories for i2c_edid
Users that are interested in i2c_edid are comparing it to the libraries listed below
Sorting:
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆60Updated 6 years ago
- CologneChip GateMate FPGA Module: GMM-7550☆22Updated this week
- Drop In USB CDC ACM core for iCE40 FPGA☆34Updated 3 years ago
- ULPI Link Wrapper (USB Phy Interface)☆28Updated 5 years ago
- USB serial device (CDC-ACM)☆40Updated 5 years ago
- Portable HyperRAM controller☆56Updated 8 months ago
- ☆45Updated 2 years ago
- Digital FM Radio Receiver for FPGA☆61Updated 9 years ago
- ECP5 FPGA in an "S7 Mini" form factor☆82Updated 3 years ago
- FPGA implementation of DSITx (single lane) used in conjunction with ipod nano 7th gen display☆22Updated 7 years ago
- Experimental FPGA project for streaming two MIPI CSI camera streams to an HDMI monitor using a ULX3S FPGA board☆30Updated 2 years ago
- ESP8266 Xilinx Virtual Cable - wifi JTAG☆39Updated 4 years ago
- Xilinx 7-series FTDI-FPGA interface through JTAG with 125 us roundtrip latency☆18Updated 6 years ago
- Tiny tips for Colorlight i5 FPGA board☆57Updated 4 years ago
- WCH CH569 SerDes Reverse Engineering☆26Updated 2 years ago
- FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.☆56Updated 2 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆91Updated 7 years ago
- FPGA dev board based on Lattice iCE40 8k☆70Updated 5 years ago
- A configurable USB 2.0 device core☆31Updated 5 years ago
- Design to connect Lattice Ultraplus FPGA to LH154Q01 Display☆28Updated 7 years ago
- usb-jtag - Altera USB Blaster Emulation with a FX2☆72Updated 4 years ago
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆43Updated 4 years ago
- Nitro USB FPGA core☆87Updated last year
- verilog core for ws2812 leds☆33Updated 3 years ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆38Updated last year
- USB DFU bootloader gateware / firmware for FPGAs☆67Updated 10 months ago
- Basic USB 1.1 Host Controller for small FPGAs☆91Updated 5 years ago
- Using the TinyFPGA BX USB code in user designs☆50Updated 6 years ago
- Gateware / Firmware / BuildRoot to run linux on iCE40 / iCEBreaker☆100Updated 2 years ago
- Example designs for the Spartan7 "S7 Mini" FPGA board☆28Updated 6 years ago