Alternatives and similar repositories for FPGA-CLAHE:

Users that are interested in FPGA-CLAHE are comparing it to the libraries listed below

• BambooWhispering / FPGA-image-simulation
  FPGA图像处理仿真平台
  ☆25Updated 2 years ago
• Nitcloud / Image_sim
  基于FPGA的图像处理模块（出自于crazybingo）（将部分IP换为纯Verilog用于跨平台移植）
  ☆46Updated 4 years ago
• DOUDIU / Hardware-Implementation-of-the-Dark-Channel-Prior-Haze-Removal-Algorithm
  The Dark Channel Prior technique is implemented on FPGA using only Verilog code and no Intellectual Property, making it convenient to rep…
  ☆32Updated 9 months ago
• bxinquan / zynqmp_cam_isp_demo
  ISP-Lite, VIP, MIPI-RX IP实现，测试平台为KV260+AR1335 3MP@30fps
  ☆92Updated 2 years ago
• xiesicong / fpga_sobel_ov5640_hdmi
  fpga跑sobel识别算法
  ☆29Updated 4 years ago
• suisuisi / FPGAandImage
  image processing based FPGA
  ☆102Updated 3 years ago
• KooJaack / Canny-Edge-Detection-on-FPGA
  Implementation of Canny Edge Detection on Cyclone IV. To run project you need Quartus and ModelSim.
  ☆12Updated 4 years ago
• iharbour-heyaonan / FPGA_image_process
  FPGA实现简单的图像处理算法
  ☆41Updated 2 years ago
• CutestPanda / Opensoc
  包含了SOC设计中的通用IP，如外设、总线结构、基础、验证等
  ☆69Updated last week
• DOUDIU / Hardware-Implementation-of-the-Canny-Edge-Detection-Algorithm
  The Canny Edge Detection algorithm is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient t…
  ☆34Updated 11 months ago
• bxinquan / zynq_cam_isp_demo
  基于verilog实现了ISP图像处理IP
  ☆252Updated 2 years ago
• Aperture-Electronic / SystemVerilog-Bitmap-Library-AXI-Image-VIP
  Bitmap Processing Library & AXI-Stream Video Image VIP
  ☆30Updated 2 years ago
• markos-stefanidis / FPGA-Based-HDR-algorithm
  Hardware implementation of HDR image producing algorithm
  ☆16Updated 2 years ago
• luyixdu / ZYNQ_ov5640_hdmi_frame_difference
  帧差法运动目标检测，基于ZYNQ7020
  ☆62Updated 3 years ago
• suisuisi / FPGAandStudy
  帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目
  ☆34Updated 2 years ago
• flytt-away / FPGA-Video-Capture
  2023集创赛紫光同创杯一等奖项目
  ☆105Updated last year
• echoPinkApple / bilinear
  Bilinear interpolation realizes image scaling based on FPGA
  ☆25Updated 4 years ago
• Thes0me / pango_video_local_dimming
  2022年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛紫光同创赛道视频色度亮度提取赛题设计源文件
  ☆32Updated 2 years ago
• Frogwells / fpga_design
  这是我所开发的两个项目，包括ov5640-ddr3-usb2.0高速图像采集系统以及NOIP1SN1300A-ddr3-sdhc高速地表图像采集及存储系统
  ☆85Updated 7 years ago
• BIT-stream-lab / Multifunctional-video-processing-platform
  该作品为2024年FPGA创新设计大赛（上海安路科技赛道）国一作品
  ☆19Updated 2 months ago
• bird1and1fish / Frame_Difference
  FPGA实现动态图像识别
  ☆17Updated 4 years ago
• xiesicong / fpga_eth_dual_ov5640
  fpga读取摄像头数据上传到上位机，720P@60Hz
  ☆19Updated 4 years ago
• suisuisi / FPGA
  FPGA
  ☆122Updated 4 years ago
• WayneGong / Image_Rotate
  视频旋转（2019FPGA大赛）
  ☆33Updated 4 years ago
• wdxm657 / fpga_practice
  ☆32Updated last year
• AugustinJose1221 / FPGA-Build
  A novel architectural design for stitching video streams in real-time on an FPGA.
  ☆118Updated 3 years ago
• huanggeli / yolov3tiny-ZYNQ7000
  a Real-time image recognition project with RTL accelerator and ZYNQ Architecture
  ☆54Updated 11 months ago
• lucky-wfw / IC_System_Design
  Use Verilog to complete the design of various digital circuits, including common interfaces, such as UART, Bluetooth, IIC, AMBA, etc. It …
  ☆27Updated 4 years ago
• bunny965 / yolov5-fpga-hardware-acceleration
  网络训练、图像预处理以及部分hend功能是基于pc端实现的，只有主干网络部署在fpga上，片上资源无法支持整个网络所需资源，建议添加外部存储及DDR
  ☆91Updated last year
• GuoningHuang / FPGA-CNN-accelerator-based-on-systolic-array
  2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器，支持yolov3-tiny的第一层卷积层计算，可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。
  ☆156Updated 4 months ago