Alternatives and similar repositories for FPGA-radio

Users that are interested in FPGA-radio are comparing it to the libraries listed below

• owocomm-0 / fpga-fft
  A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
  ☆126Updated 4 years ago
• ZipCPU / sdr
  A basic Soft(Gate)ware Defined Radio architecture
  ☆100Updated 2 years ago
• hukenovs / intfftk
  Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…
  ☆86Updated 2 years ago
• mattvenn / fpga-sdft
  sliding DFT for FPGA, targetting Lattice ICE40 1k
  ☆76Updated 5 years ago
• emard / flearadio
  Digital FM Radio Receiver for FPGA
  ☆63Updated 10 years ago
• alberto-grl / 1bitSDR
  Minimal SDR with Lattice MachXO2 FPGA. And a port to Cyclone3 by Steven Groom
  ☆108Updated 5 years ago
• regymm / PYNQSDR
  PYNQ-Z1 + AD936X openwifi capable SDR platform
  ☆120Updated 6 months ago
• ZipCPU / dspfilters
  A collection of demonstration digital filters
  ☆165Updated 2 years ago
• ZipCPU / interpolation
  Digital Interpolation Techniques Applied to Digital Signal Processing
  ☆67Updated last year
• ZipCPU / fftdemo
  A demonstration showing how several components can be compsed to build a simulated spectrogram
  ☆47Updated last year
• ultraembedded / core_usb_host
  Basic USB 1.1 Host Controller for small FPGAs
  ☆97Updated 5 years ago
• ZipCPU / dblclockfft
  A configurable C++ generator of pipelined Verilog FFT cores
  ☆251Updated last year
• dawsonjon / FPGA-TX
  FPGA based transmitter
  ☆99Updated 8 years ago
• openXC7 / toolchain-installer
  Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7
  ☆91Updated 6 months ago
• ZipCPU / dpll
  A collection of phase locked loop (PLL) related projects
  ☆115Updated 2 years ago
• BerkeleyLab / Bedrock
  LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled
  ☆108Updated this week
• MorrisMA / 1PPS-DPLL
  DPLL for phase-locking to 1PPS signal
  ☆34Updated 9 years ago
• davemuscle / sigma_delta_converters
  Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components
  ☆76Updated 3 years ago
• ZipCPU / cordic
  A series of CORDIC related projects
  ☆120Updated last year
• LukiLeu / FPGA_ADC
  An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components
  ☆46Updated 4 years ago
• hamsternz / MMCM_GPSDO
  An all-digital GPS disciplined oscillator using MMCM phase shift.
  ☆32Updated 3 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆61Updated 2 years ago
• ultraembedded / core_ft60x_axi
  FTDI FT600 SuperSpeed USB3.0 to AXI bus master
  ☆97Updated 5 years ago
• yrrapt / amsat_txrx_ic
  An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)
  ☆73Updated 4 years ago
• hamsternz / second_order_sigma_delta_DAC
  A comparison of 1st and 2nd order sigma delta DAC for FPGA
  ☆60Updated 5 years ago
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆50Updated 3 months ago
• ulixxe / usb_cdc
  Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs
  ☆186Updated last year
• m-labs / jesd204b
  JESD204B core for Migen/MiSoC
  ☆35Updated 4 years ago
• amaranth-farm / amlib
  assorted library of utility cores for amaranth HDL
  ☆100Updated last year
• OpenResearchInstitute / dvb_fpga
  RTL implementation of components for DVB-S2
  ☆130Updated 2 years ago