bluecmd / fejkon
Fibre Channel / FICON HBA implemented on FPGA
☆38Updated 4 years ago
Alternatives and similar repositories for fejkon
Users that are interested in fejkon are comparing it to the libraries listed below
Sorting:
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆62Updated this week
- Open source 10 Gigabit Ethernet MAC core compatible with Xilinx's non-free 10GMAC☆62Updated 8 years ago
- A FPGA implementation of the NTP and NTS protocols☆58Updated last year
- ☆45Updated 3 years ago
- Bitstream relocation and manipulation tool.☆44Updated 2 years ago
- FPGA board-level debugging and reverse-engineering tool☆37Updated 2 years ago
- A collection of debugging busses developed and presented at zipcpu.com☆41Updated last year
- Open source FPGA-based NIC and platform for in-network compute☆62Updated 6 months ago
- implement PCIE devices using C or VHDL and test them against a QEMU virtualized architecture☆102Updated 6 years ago
- Universal Advanced JTAG Debug Interface☆17Updated last year
- Small footprint and configurable SATA core☆140Updated 3 weeks ago
- SGMII☆12Updated 10 years ago
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆41Updated 4 years ago
- Test of the USB3 IP Core from Daisho on a Xilinx device☆90Updated 5 years ago
- An open standard Cache Coherent Fabric Interface repository☆66Updated 5 years ago
- Minimal DVI / HDMI Framebuffer☆80Updated 4 years ago
- This is mainly a simulation library of xilinx primitives that are verilator compatible.☆33Updated 10 months ago
- ☆13Updated 3 years ago
- Generic Logic Interfacing Project☆46Updated 4 years ago
- Extensible FPGA control platform☆60Updated 2 years ago
- Small footprint and configurable Inter-Chip communication cores☆57Updated 3 weeks ago
- A quick reference/ cheatsheet for the ARM AMBA Advanced eXtensible Interface (AXI)☆27Updated 6 years ago
- LeWiz Communications Ethernet MAC Core2 10G/5G/2.5G/1G☆36Updated 2 years ago
- Use an MPSSE FTDI device as a JTAG interface in Quartus tools☆21Updated last year
- Contains VHDL IP-blocks to create stand-alone RapidIO-endpoints, RapidIO-switches and RapidIO-switches with local endpoints.☆33Updated 7 years ago
- Wishbone interconnect utilities☆41Updated 3 months ago
- Nvidia/Mellanox Innova-2 Flex Open Programmable SmartNIC Setup and Usage Notes for XCKU15P FPGA Development☆60Updated 8 months ago
- IEEE P1735 decryptor for VHDL☆32Updated 9 years ago
- Collected resources and getting started with Azure PCIe FPGA device☆19Updated 2 months ago
- Small footprint and configurable JESD204B core☆42Updated 3 weeks ago