☆16Oct 20, 2025Updated 6 months ago
Alternatives and similar repositories for softex
Users that are interested in softex are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A simple, scalable, source-synchronous, all-digital DDR link☆37Apr 7, 2026Updated 3 weeks ago
- Reinforcement learning with 2D games / Apprentissage par renforcement avec des jeux 2D☆16May 16, 2025Updated 11 months ago
- ☆47Apr 8, 2023Updated 3 years ago
- The official NaplesPU hardware code repository☆24Jul 27, 2019Updated 6 years ago
- ☆16Updated this week
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- An open source, parameterized SystemVerilog digital hardware IP library☆33May 26, 2024Updated last year
- Label-Imbalanced and Group-Sensitive Classification under Overparameterization☆17Nov 3, 2021Updated 4 years ago
- Anatomy of a powerhouse: SystemVerilog TPU based on Google TPU v1☆21Nov 9, 2025Updated 5 months ago
- 32 - bit floating point Multiplier Accumulator Unit (MAC)☆33Jan 12, 2021Updated 5 years ago
- This is the repository containing the implementation of sparse dense matrix multiplication for the matrix dimension of 560 x 560.☆10Jul 7, 2021Updated 4 years ago
- Petri Net Simulator program☆10Nov 27, 2017Updated 8 years ago
- ☆22May 14, 2025Updated 11 months ago
- Simodense: a RISC-V softcore for custom SIMD instructions☆17Feb 16, 2026Updated 2 months ago
- Working 8x8 systolic array hardware implemented in Xilinx Vivado, operated and controlled in software using Xilinx Vitis☆17Feb 16, 2024Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- 保存（原）东京工业大学IGP群的资料☆15Oct 10, 2024Updated last year
- CV32E40X Design-Verification environment☆16Mar 25, 2024Updated 2 years ago
- Inertial Measurement Unit (IMU) Driver based on on the MPU6050☆10Mar 23, 2020Updated 6 years ago
- ☆22Oct 13, 2025Updated 6 months ago
- This is a fork of zsim (see https://github.com/s5z/zsim) which integrates the NVMain main memory simulator, adding 3D stacking and non-vo…☆26Jan 15, 2015Updated 11 years ago
- C library containing high resolution timer implementation for several platforms.☆10Oct 20, 2020Updated 5 years ago
- This repository presents the mixed signal design of a Counter Type/ Ramp Type ADC. The Digital part of the circuit i.e 4- bit counter is …☆13May 2, 2022Updated 3 years ago
- Hardware Division Units☆10Jul 17, 2014Updated 11 years ago
- Porting FreeRTOS to a RISC-V based system on PYNQ-Z2☆11Dec 26, 2024Updated last year
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- RADIX-4 SRT division☆12Oct 31, 2019Updated 6 years ago
- Our contribution to the AMD Open Hardware Contest: A ML-based Deep Packet Inspection for RDMA-networking on FPGAs☆12Dec 10, 2024Updated last year
- This repository contains papers for a comprehensive survey on accelerated generation techniques in Large Language Models (LLMs).☆11May 24, 2024Updated last year
- Matrix multiplication accelerator on ZYNQ SoC.☆12Apr 29, 2025Updated last year
- FocusFlow: Boosting Key-Points Optical Flow Estimation for Autonomous Driving☆11Jan 22, 2024Updated 2 years ago
- Open-Source Framework for Co-Emulation☆13Feb 12, 2021Updated 5 years ago
- Used FPGA board and System Verilog to design controller, DMA, pipelined SIMD processor, and GEMM accelerator☆12Aug 26, 2023Updated 2 years ago
- This project implements the Titans architecture from the paper "Titans: Learning to Memorize at Test Time" for market data prediction.☆11Jan 19, 2025Updated last year
- This repository contains my notes for the University of Bologna's Autonomous and Adaptive Systems course, held by prof. Mirco Musolesi.☆25Jul 6, 2022Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- 4 stage, in-order, secure RISC-V core based on the CV32E40P☆160Oct 31, 2024Updated last year
- The multi-core cluster of a PULP system.☆113Mar 28, 2026Updated last month
- ☆11Jun 4, 2024Updated last year
- ☆18May 5, 2022Updated 3 years ago
- Hand Writing Digital Recognization Based on FPGA, we desiged a SoC embeded a Cortex M3 core and other peripherals，this SoC run a CNN. The…☆13Mar 30, 2023Updated 3 years ago
- A generic Janus WebRTC Media Server Docker container☆12Mar 15, 2024Updated 2 years ago
- （Not actively updating）Vision Transformer Accelerator implemented in Vivado HLS for Xilinx FPGAs.☆20Dec 29, 2024Updated last year