antmicro / kenning-pipeline-manager
☆19Updated last week
Alternatives and similar repositories for kenning-pipeline-manager:
Users that are interested in kenning-pipeline-manager are comparing it to the libraries listed below
- ☆18Updated last year
- A Python package for generating HDL wrappers and top modules for HDL sources☆32Updated last week
- Löwe FPGA Board☆12Updated last year
- sump3 logic analyzer☆19Updated 3 months ago
- Generate Zynq configurations without using the vendor GUI☆30Updated last year
- Experimental GMSL2 serializer board compatible with Antmicro MIPI CSI video accessories☆12Updated this week
- Virtual development board for HDL design☆41Updated last year
- ☆15Updated last week
- Experimental FPGA project for streaming two MIPI CSI camera streams to an HDMI monitor using a ULX3S FPGA board☆29Updated last year
- ☆14Updated 6 months ago
- 🔌 Compact JTAG ("cJTAG") to 4-wire JTAG (IEEE 1149.1) bridge.☆23Updated 3 years ago
- USB-PD-3.1-Verilog☆12Updated 11 months ago
- ☆40Updated 2 years ago
- Projects published on controlpaths.com and hackster.io☆40Updated 2 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆50Updated 2 months ago
- Open Hardware carrier board supporting modules with Zynq 7000 All Programmable SoC devices.☆58Updated last year
- Flip flop setup, hold & metastability explorer tool☆34Updated 2 years ago
- FLIX-V: FPGA, Linux and RISC-V☆41Updated last year
- USB virtual model in C++ for Verilog☆29Updated 5 months ago
- ☆59Updated 3 years ago
- Solving Sudokus using open source formal verification tools☆16Updated 2 years ago
- Small footprint and configurable Inter-Chip communication cores☆56Updated last month
- RISC-V Processor written in Amaranth HDL☆37Updated 3 years ago
- Demo board for TT4 and beyond☆20Updated last month
- Conecting the Litefury FPGA accelerator to Raspberry Pi 5 over PCIe gen2 x1☆27Updated last year
- A current mode buck converter on the SKY130 PDK☆27Updated 3 years ago
- EVEREST: e-Versatile Research Stick for peoples☆36Updated last year
- a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface☆32Updated 3 years ago
- high level VHDL floating point library for synthesis in fpga☆15Updated last month
- Dockerized FPGA toolchains containing openxc7, f4pga, vivado and more☆13Updated last week