Alternatives and similar repositories for sargraph:

Users that are interested in sargraph are comparing it to the libraries listed below

• antmicro / topwrap
  A Python package for generating HDL wrappers and top modules for HDL sources
  ☆30Updated 2 weeks ago
• SystemRDL / PeakRDL-cheader
  ☆11Updated last month
• tudortimi / ipxact
  IP-XACT XML binding library
  ☆15Updated 8 years ago
• mattvenn / gtkwave-python-filter-process
  ☆33Updated 4 years ago
• Kuree / pysv
  Running Python code in SystemVerilog
  ☆67Updated 7 months ago
• Ben1152000 / sootty
  A command-line tool for displaying vcd waveforms.
  ☆51Updated last year
• SystemRDL / PeakRDL-html
  Generate address space documentation HTML from compiled SystemRDL input
  ☆48Updated 5 months ago
• alexforencich / cocotbext-uart
  UART models for cocotb
  ☆26Updated last year
• FPGA-Systems / drawio-hdl-builder
  Drawio => VHDL and Verilog
  ☆52Updated last year
• aesc-silicon / i2c-gpio-expander
  End-to-End Open-Source I2C GPIO Expander
  ☆31Updated last week
• efabless / raptor
  Arm Cortex-M0 based Customizable SoC for IoT Applications
  ☆12Updated 4 years ago
• mattvenn / multi_project_tools
  tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles
  ☆35Updated 2 years ago
• GuzTech / misato
  RISC-V Processor written in Amaranth HDL
  ☆36Updated 3 years ago
• drom / atom-hide
  Atom Hardware IDE
  ☆13Updated 3 years ago
• XedaHQ / xeda
  Cross EDA Abstraction and Automation
  ☆36Updated this week
• wyvernSemi / usbModel
  USB virtual model in C++ for Verilog
  ☆29Updated 4 months ago
• SystemRDL / PeakRDL-regblock
  Generate SystemVerilog RTL that implements a register block from compiled SystemRDL input.
  ☆55Updated 2 months ago
• stnolting / fpga_torture
  🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.
  ☆29Updated 2 years ago
• ydnatag / nmigen-cocotb
  cocotb extension for nMigen
  ☆16Updated 2 years ago
• craigjb / fuse-zynq
  Generate Zynq configurations without using the vendor GUI
  ☆30Updated last year
• Risto97 / PeakRDL-halcpp
  C++ 17 Hardware abstraction layer generator from systemrdl
  ☆12Updated 5 months ago
• psychogenic / microcotb
  micro version of cocotb, to run on microcontrollers or desktop to get hardware in the loop
  ☆13Updated 3 weeks ago
• OpenAutomationTechnologies / VHDL_IP-Cores
  ☆16Updated 4 years ago
• AEW2015 / fpga-colab
  FPGA examples on Google Colab
  ☆19Updated 10 months ago
• RobertBaruch / amaranth-tutorial
  ☆39Updated last year
• AUCOHL / Lighter
  An automatic clock gating utility
  ☆43Updated 7 months ago
• tongchen126 / Boot-Debian-On-Litex-Rocket
  ☆13Updated 2 years ago
• Toroid-io / vcd2wavedrom
  Python script to transform a VCD file to wavedrom format
  ☆75Updated 2 years ago
• FPGA-Research / byteman
  Bitstream relocation and manipulation tool.
  ☆43Updated 2 years ago
• hdl-util / i2c
  Fully featured implementation of Inter-IC (I2C) bus master for FPGAs
  ☆26Updated 4 years ago