antmicro / pyrenode3Links
☆28Updated last month
Alternatives and similar repositories for pyrenode3
Users that are interested in pyrenode3 are comparing it to the libraries listed below
Sorting:
- ☆110Updated this week
- A full micro-controller system utilizing the CHERIoT Ibex core, part of the Sunburst project funded by UKRI☆46Updated last month
- RISC-V fast interrupt controller☆29Updated 2 months ago
- A configurable and approachable tool for FPGA debugging and rapid prototyping.☆147Updated 2 weeks ago
- Caliptra IP and firmware for integrated Root of Trust block☆376Updated last week
- ☆87Updated last week
- Monorepo containing a machine-readable database of the RISC-V specification and artifact generation tools☆149Updated this week
- FOSS Flow For FPGA☆424Updated last year
- HW Design Collateral for Caliptra RoT IP☆127Updated last week
- Linux capable RISC-V SoC designed to be readable and useful.☆158Updated last month
- LiteX boards files☆462Updated last week
- OpenEmbedded/Yocto layer for RISC-V Architecture☆423Updated this week
- Code for Bruno Levy's learn-fpga tutorial written in Amaranth HDL☆112Updated last year
- ☆21Updated 3 weeks ago
- 📦 Prebuilt RISC-V GCC toolchains for x64 Linux.☆107Updated 11 months ago
- ☆16Updated last year
- The main Embench repository☆301Updated last year
- Communication framework for RTL simulation and emulation.☆308Updated last month
- A mixed-criticality platform built around Cheshire, with a number of safety/security and predictability features. Ready-to-use FPGA flow …☆117Updated 6 months ago
- 📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.☆88Updated this week
- ASIC implementation flow infrastructure, successor to OpenLane☆276Updated this week
- Reference implementation of RPMI specification as a library.☆13Updated last month
- cheriot-ibex is a RTL implementation of CHERIoT ISA based on LowRISC's Ibex core.☆119Updated 5 months ago
- CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, suppo…☆483Updated this week
- VCD viewer☆101Updated 5 months ago
- A set of benchmarks chosen to show the energy consumption of embedded devices under different conditions☆71Updated 2 years ago
- 🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).☆214Updated 2 months ago
- CORE-V Family of RISC-V Cores☆324Updated 11 months ago
- A dependency management tool for hardware projects.☆344Updated this week
- SD-Card controller, using either SPI, SDIO, or eMMC interfaces☆354Updated 3 months ago