Alternatives and similar repositories for invalidate-compare

Users that are interested in invalidate-compare are comparing it to the libraries listed below

• 0x5ec1ab / gpu-tlb
  ☆59Updated 2 months ago
• mktrm / SecSMT_Artifact
  The artifact for SecSMT paper -- Usenix Security 2022
  ☆27Updated 2 years ago
• hku-systems / cronus
  ☆18Updated 2 years ago
• SJTU-IPADS / PipeLLM
  ☆19Updated 6 months ago
• gururaj-s / streamline
  Streamline Covert Channel Attack (presented in ASPLOS'21)
  ☆20Updated 4 years ago
• TwinVisor / twinvisor-prototype
  ☆23Updated 2 years ago
• dskarlatos / ElasticCuckooHashing
  (elastic) cuckoo hashing
  ☆14Updated 5 years ago
• fanyao / branchspec
  Proof of concept code for the BranchSpec exploit.
  ☆9Updated 2 years ago
• Compass-All / CCS22-StrongBox
  ☆32Updated 2 years ago
• dskarlatos / MicroScope
  Microscope: Enabling Microarchitectural Replay Attacks
  ☆19Updated 4 years ago
• gururaj-s / mirage
  MIRAGE (USENIX Security 2021)
  ☆13Updated last year
• FxPiGaAo / Hacky-Racer
  ☆16Updated last year
• jasonyu1996 / elasticlave
  ☆22Updated 3 months ago
• stanford-mast / ShEF
  Shielded Enclaves for Cloud FPGAs
  ☆15Updated 3 years ago
• zzrcxb / PinnedLoads
  Gem5 implementation of Pinned Loads: Taming Speculative Loads in Secure Processors
  ☆9Updated 2 years ago
• eepalms / gem5-newcache
  New Cache implementation using Gem5
  ☆13Updated 11 years ago
• gururaj-s / cleanupspec
  CleanupSpec (MICRO-2019)
  ☆17Updated 4 years ago
• mjyan0720 / InvisiSpec-1.0
  Gem5 implementation of "InvisiSpec", a defense mechanism of speculative execution attacks on cache hierarchy.
  ☆60Updated 5 years ago
• CSL-KU / SpectreGuard
  Data-centric defense mechanism against Spectre attacks. (DAC'19)
  ☆11Updated 5 years ago
• spcl / sage
  ☆27Updated 2 years ago
• bsc-mem / Mess-simulator
  A fast, accurate, and easy-to-integrate memory simulator that model memory system performance with bandwidth--latency curves.
  ☆24Updated last month
• yshalabi / covert-channel-tutorial
  Hands on with side-channels: a tutorial on covert-channels built using shared CPU resources. Three different covert-channel implementatio…
  ☆48Updated 6 years ago
• TheNetAdmin / NVLeak
  NVLeak: Off-Chip Side-Channel Attacks via Non-Volatile Memory Systems [USENIX Security '23]
  ☆18Updated 2 years ago
• efeslab / dolma
  ☆13Updated 4 years ago
• vusec / tlbdr
  ☆18Updated 2 years ago
• PittECEArch / AdversarialPrefetch
  ☆19Updated 3 years ago
• sectrs-acai / acai
  Protecting Accelerator Execution with Arm Confidential Computing Architecture (USENIX Security 2024)
  ☆26Updated last year
• cwfletcher / stt
  ☆35Updated 4 years ago
• intel / tee-io-validator
  ☆23Updated 3 weeks ago
• comparch-security / cache-model
  A behavioural cache model for analysing the cache behaviour under side-channel attack.
  ☆25Updated 9 months ago