Alternatives and similar repositories for invalidate-compare:

Users that are interested in invalidate-compare are comparing it to the libraries listed below

• 0x5ec1ab / gpu-tlb
  ☆52Updated 3 weeks ago
• mktrm / SecSMT_Artifact
  The artifact for SecSMT paper -- Usenix Security 2022
  ☆27Updated 2 years ago
• gururaj-s / streamline
  Streamline Covert Channel Attack (presented in ASPLOS'21)
  ☆20Updated 4 years ago
• Compass-All / CCS22-StrongBox
  ☆31Updated 2 years ago
• dskarlatos / MicroScope
  Microscope: Enabling Microarchitectural Replay Attacks
  ☆19Updated 4 years ago
• dskarlatos / ElasticCuckooHashing
  (elastic) cuckoo hashing
  ☆14Updated 4 years ago
• hku-systems / cronus
  ☆18Updated 2 years ago
• efeslab / dolma
  ☆12Updated 4 years ago
• fanyao / branchspec
  Proof of concept code for the BranchSpec exploit.
  ☆9Updated 2 years ago
• sectrs-acai / acai
  Protecting Accelerator Execution with Arm Confidential Computing Architecture (USENIX Security 2024)
  ☆26Updated last year
• renxida / iseedeaduops-poc
  Proof-of-concept for I See Dead Micro-Ops transient execution attack
  ☆14Updated 3 years ago
• gururaj-s / cleanupspec
  CleanupSpec (MICRO-2019)
  ☆17Updated 4 years ago
• stanford-mast / ShEF
  Shielded Enclaves for Cloud FPGAs
  ☆15Updated 3 years ago
• FxPiGaAo / Hacky-Racer
  ☆16Updated last year
• yshalabi / covert-channel-tutorial
  Hands on with side-channels: a tutorial on covert-channels built using shared CPU resources. Three different covert-channel implementatio…
  ☆44Updated 5 years ago
• jasonyu1996 / elasticlave
  ☆23Updated last month
• spcl / sage
  ☆27Updated last year
• mjyan0720 / InvisiSpec-1.0
  Gem5 implementation of "InvisiSpec", a defense mechanism of speculative execution attacks on cache hierarchy.
  ☆60Updated 4 years ago
• KULeuven-COSIC / PRIME-SCOPE
  The open-source component of Prime+Scope, published at CCS 2021
  ☆30Updated last year
• TwinVisor / twinvisor-prototype
  ☆21Updated 2 years ago
• cgvwzq / cachequery
  HW interface for memory caches
  ☆26Updated 4 years ago
• comparch-security / cache-model
  A behavioural cache model for analysing the cache behaviour under side-channel attack.
  ☆24Updated 6 months ago
• eepalms / gem5-newcache
  New Cache implementation using Gem5
  ☆13Updated 11 years ago
• WukLab / Pythia
  Pythia is a set of RDMA-based remote side-channel attacks. USENIX Security 2019.
  ☆27Updated 4 years ago
• cwfletcher / stt
  ☆35Updated 4 years ago
• zzrcxb / PinnedLoads
  Gem5 implementation of Pinned Loads: Taming Speculative Loads in Secure Processors
  ☆9Updated 2 years ago
• CSL-KU / SpectreGuard
  Data-centric defense mechanism against Spectre attacks. (DAC'19)
  ☆11Updated 5 years ago
• vusec / tlbdr
  ☆17Updated 2 years ago
• intel / tee-io-validator
  ☆17Updated this week
• bsc-mem / Mess-benchmark
  A Multiplatform benchmark designed to provide holistic, detailed and close-to-hardware view of memory system performance with family of b…
  ☆32Updated 2 weeks ago