Alternatives and similar repositories for openocd:

Users that are interested in openocd are comparing it to the libraries listed below

• foss-for-synopsys-dwc-arc-processors / toolchain
  Repository containing releases of prebuilt GNU toolchains for DesignWare ARC Processors from Synopsys (available from "releases" link bel…
  ☆96Updated 3 weeks ago
• enjoy-digital / daisho
  Test of the USB3 IP Core from Daisho on a Xilinx device
  ☆86Updated 5 years ago
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆37Updated 3 years ago
• mmicko / prjtang
  Documenting the Anlogic FPGA bit-stream format.
  ☆86Updated 2 years ago
• m-labs / lm32
  LatticeMico32 soft processor
  ☆104Updated 10 years ago
• magro732 / OpenRIO
  Contains VHDL IP-blocks to create stand-alone RapidIO-endpoints, RapidIO-switches and RapidIO-switches with local endpoints.
  ☆34Updated 7 years ago
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆41Updated last month
• f4pga / prjxray-db
  Project X-Ray Database: XC7 Series
  ☆65Updated 3 years ago
• antmicro / usb-test-suite-build
  Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores
  ☆50Updated last year
• freecores / freecores.github.io
  Freecores website
  ☆19Updated 8 years ago
• quartiq / bscan_spi_bitstreams
  FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.
  ☆53Updated last year
• fjullien / jtag_vpi
  TCP/IP controlled VPI JTAG Interface.
  ☆63Updated last month
• cambridgehackers / fpgajtag
  A simple jtag programming tool that has been verified on a variety of Xilinx Series7 platforms.
  ☆34Updated 2 years ago
• timvideos / HDMI2USB-numato-opsis-sample-code
  Example code for the Numato Opsis board, the first HDMI2USB production board.
  ☆49Updated 6 years ago
• bluespec / RISCV_gdbstub
  A gdbstub for connecting GDB to a RISC-V Debug Module
  ☆26Updated 4 months ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆55Updated last month
• cliffordwolf / icotools
  Tools and Examples for IcoBoard
  ☆79Updated 3 years ago
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆54Updated last year
• gregdavill / ecpprog
  Programmer for the Lattice ECP5 series, making use of FTDI based adaptors
  ☆88Updated 3 months ago
• freecores / turbo8051
  turbo 8051
  ☆28Updated 7 years ago
• gsomlo / yoloRISC
  A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga
  ☆26Updated 5 years ago
• c-sky / csky-linux
  C-SKY Linux Port
  ☆74Updated 3 months ago
• esynr3z / usb20dev
  USB 2.0 FS Device controller IP core written in SystemVerilog
  ☆33Updated 6 years ago
• Featherweight-IP / fwrisc
  Featherweight RISC-V implementation
  ☆52Updated 3 years ago
• SpinalHDL / openocd_riscv
  Spen's Official OpenOCD Mirror
  ☆48Updated 11 months ago
• litex-hub / litespi
  Small footprint and configurable SPI core
  ☆41Updated last month
• enjoy-digital / litesata
  Small footprint and configurable SATA core
  ☆134Updated last month
• openrisc / or1ksim
  The OpenRISC 1000 architectural simulator
  ☆72Updated 5 months ago
• im-tomu / valentyusb
  FPGA USB stack written in LiteX
  ☆126Updated 2 years ago
• alexforencich / pin-uart
  FPGA board-level debugging and reverse-engineering tool
  ☆34Updated last year