Alternatives and similar repositories for tt09

Users that are interested in tt09 are comparing it to the libraries listed below

• YoWASP / yosys
  Unofficial Yosys WebAssembly packages
  ☆71Updated this week
• prjunnamed / prjcombine
  An FPGA reverse engineering and documentation project
  ☆49Updated this week
• tomverbeure / cxxrtl_eval
  Experiments with Yosys cxxrtl backend
  ☆49Updated 6 months ago
• MichaelBell / nanoV
  RISC-V RV32E core designed for minimal area
  ☆16Updated 8 months ago
• gatecat / hrt
  Hot Reconfiguration Technology demo
  ☆40Updated 2 years ago
• sylefeb / Silixel
  Exploring gate level simulation
  ☆58Updated 2 months ago
• TinyTapeout / tt-support-tools
  tools used by project repos to test configuration, generate OpenLane run summaries and documentation
  ☆23Updated 3 weeks ago
• robtaylor / amaranth-awesome
  Awesome projects using the Amaranth HDL
  ☆17Updated 5 months ago
• BrunoLevy / TordBoyau
  A pipelined RISC-V processor
  ☆57Updated last year
• gsomlo / yoloRISC
  A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga
  ☆26Updated 5 years ago
• amaranth-lang / amaranth-stdio
  Industry standard I/O for Amaranth HDL
  ☆28Updated 9 months ago
• RTimothyEdwards / irsim
  IRSIM switch-level simulator for digital circuits
  ☆34Updated 3 months ago
• cr1901 / sentinel
  Another size-optimized RISC-V CPU for your consideration.
  ☆58Updated this week
• sylefeb / Iron
  Iron: selectively turn RISC-V binaries into hardware
  ☆23Updated 2 years ago
• zeroasiccorp / ebrick-demo
  Demo: how to create a custom EBRICK
  ☆21Updated 7 months ago
• TinyTapeout / tinytapeout_gds_viewer
  Tiny Tapeout GDS Online Viewer
  ☆19Updated last month
• amaranth-lang / rtl-debugger
  VS Code based debugger for hardware designs in Amaranth or Verilog
  ☆39Updated 7 months ago
• FPGAOL-CE / osstoolchain-docker-things
  Dockerized FPGA toolchains containing openxc7, f4pga, vivado and more
  ☆14Updated 3 months ago
• mattvenn / magic-inverter
  an inverter drawn in magic with makefile to simulate
  ☆26Updated 3 years ago
• antonblanchard / ghdl-yosys-blink
  Blink an LED on an FPGA in VHDL using ghdl, yosys and nextpnr
  ☆26Updated 5 years ago
• YosysHQ / abc
  ABC: System for Sequential Logic Synthesis and Formal Verification
  ☆28Updated last week
• rxrbln / picorv32
  PicoRV32 - A Size-Optimized RISC-V CPU
  ☆26Updated 4 years ago
• zeroasiccorp / umi
  Universal Memory Interface (UMI)
  ☆147Updated last week
• NyanCAD / Mosaic
  A modern schematic entry and simulation program
  ☆70Updated last week
• os-fpga / Raptor
  Raptor end-to-end FPGA Compiler and GUI
  ☆83Updated 7 months ago
• CedarEDA / CedarSim.jl
  Analog Circuit Simulator
  ☆21Updated 10 months ago
• htfab / rotfpga
  A reconfigurable logic circuit made of identical rotatable tiles.
  ☆22Updated 3 years ago
• mattvenn / vga-clock
  Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.
  ☆62Updated 3 years ago
• amaranth-lang / amaranth-soc
  System on Chip toolkit for Amaranth HDL
  ☆92Updated 9 months ago
• TinyTapeout / tt-multiplexer
  ☆17Updated this week