SMB784 / SQRL_quickstart
Basic loadout for SQRL Acorn CLE 215/215+ board. Blinks all LEDs, outputs square waves on all 12 GPIO outputs
☆65Updated 3 years ago
Alternatives and similar repositories for SQRL_quickstart:
Users that are interested in SQRL_quickstart are comparing it to the libraries listed below
- LiteX development baseboards arround the SQRL Acorn.☆61Updated 10 months ago
- Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe☆95Updated last year
- Small footprint and configurable SPI core☆41Updated 2 months ago
- assorted library of utility cores for amaranth HDL☆86Updated 5 months ago
- A basic Soft(Gate)ware Defined Radio architecture☆79Updated last year
- FTDI FT600 SuperSpeed USB3.0 to AXI bus master☆93Updated 4 years ago
- FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.☆53Updated last year
- An all-digital GPS disciplined oscillator using MMCM phase shift.☆28Updated 2 years ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆67Updated 8 months ago
- Ultimate ECP5 development board☆104Updated 5 years ago
- Change part number or package in a Xilinx 7-series FPGA bitstream☆37Updated 4 years ago
- Extensible FPGA control platform☆59Updated last year
- Test of the USB3 IP Core from Daisho on a Xilinx device☆87Updated 5 years ago
- ☆22Updated 3 years ago
- Nitro USB FPGA core☆84Updated last year
- PCIe analyzer experiments☆52Updated 4 years ago
- FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge☆32Updated 3 years ago
- ☆43Updated 2 years ago
- ☆105Updated 2 years ago
- Small footprint and configurable Inter-Chip communication cores☆55Updated 2 weeks ago
- ☆45Updated 2 years ago
- PCIe adapter for an FPGA accelerator for Open CloudServer☆22Updated 4 years ago
- FPGA USB stack written in LiteX☆126Updated 2 years ago
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆42Updated 10 months ago
- Reference design for Lattice ECP5 FPGA. Featuring Raspberry Pi interface and 6 PMODs☆105Updated 3 years ago
- Small footprint and configurable JESD204B core☆41Updated 2 months ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆62Updated 2 weeks ago
- XTRX LiteX/LitePCIe based design for Julia Computing☆26Updated last year
- FPGA board-level debugging and reverse-engineering tool☆36Updated last year
- Generate Zynq configurations without using the vendor GUI☆30Updated last year