Alternatives and similar repositories for PIM-SW-Doc

Users that are interested in PIM-SW-Doc are comparing it to the libraries listed below

• PIM-SW / PIM-Software
  ☆26Updated last year
• PIM-SW / PIM-Simulator
  ☆24Updated 3 years ago
• PIM-SW / PIM-Application
  ☆24Updated last year
• scale-snu / attacc_simulator
  ☆69Updated 11 months ago
• VIA-Research / uPIMulator
  ☆140Updated 4 months ago
• casys-kaist / NeuPIMs
  NeuPIMs: NPU-PIM Heterogeneous Acceleration for Batched LLM Inferencing
  ☆83Updated 11 months ago
• SAITPublic / PIMSimulator
  Processing-In-Memory (PIM) Simulator
  ☆165Updated 5 months ago
• upmem / upmem_llm_framework
  UPMEM LLM Framework allows profiling PyTorch layers and functions and simulate those layers/functions with a given hardware profile.
  ☆29Updated last week
• 7bvcxz / PIMsim
  ☆16Updated 2 years ago
• Yufeng98 / CENT
  Artifact for paper "PIM is All You Need: A CXL-Enabled GPU-Free System for LLM Inference", ASPLOS 2025
  ☆63Updated last month
• arkhadem / aim_simulator
  A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0
  ☆17Updated 4 months ago
• fangjh21 / PALM
  PALM: A Efficient Performance Simulator for Tiled Accelerators with Large-scale Model Training
  ☆16Updated 11 months ago
• VIA-Research / LazyDP
  Open-source of LazyDP published in ASPLOS-2024
  ☆22Updated last year
• Systems-ShiftLab / MultiPIM
  MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator
  ☆55Updated 3 years ago
• VIA-Research / dpsgd_profiler
  ☆20Updated 5 months ago
• Aayush-Ankit / puma-simulator
  [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…
  ☆64Updated 2 years ago
• UVA-LavaLab / PIMeval-PIMbench
  PIMeval simulator and PIMbench suite
  ☆27Updated last week
• scale-snu / mcsim_public
  ☆21Updated 2 years ago
• illinois-impact / puma-compiler
  PUMA Compiler
  ☆29Updated 5 years ago
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆43Updated 2 years ago
• Zhaoshixin-sky / CIM-MLC
  [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators
  ☆36Updated last year
• AIS-SNU / PID-Comm
  ☆24Updated 6 months ago
• stonne-simulator / stonne
  STONNE: A Simulation Tool for Neural Networks Engines
  ☆132Updated last year
• PSAL-POSTECH / M2NDP-public
  A Cycle-level simulator for M2NDP
  ☆27Updated last month
• PSAL-POSTECH / ONNXim
  ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference
  ☆118Updated 3 months ago
• scalesim-project / scale-sim-v3
  ☆13Updated 2 weeks ago
• yonsei-hpcp / pid-join
  ☆11Updated 3 weeks ago
• hal-uw / cpelide-micro24-artifact
  This GitHub repo contains the artifact for CPElide, which appears at MICRO '24
  ☆11Updated 8 months ago
• UCLA-VAST / Serpens
  Serpens is an HBM FPGA accelerator for SpMV
  ☆19Updated 10 months ago
• pku-liang / Sanger
  A co-design architecture on sparse attention
  ☆52Updated 3 years ago