RoaLogic/ahb3lite_memory external links

---

GitHub - View repository

GitHub.dev - Open in online code editor

Star history - Growth chart over time

deps.dev - Dependencies and security vulnerabilities

Gitingest - Export source code for LLM usage

Repomix - Export source code for LLM usage

uithub - Export source code for LLM usage

Close

RoaLogic/ahb3lite_memory

Readme badge preview -

If you own this repo, copy the snippet below and add it to your README.md

---

Copy

[![RelatedRepos](https://img.shields.io/badge/related-repos-yellow)](https://relatedrepos.com/gh/RoaLogic/ahb3lite_memory)

Close

RoaLogic / ahb3lite_memoryView on GitHubMore

• External links
• Readme badge

Multi-Technology RAM with AHB3Lite interface

☆25May 10, 2024Updated last year

Alternatives and similar repositories for ahb3lite_memory

Users that are interested in ahb3lite_memory are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.

• RoaLogic / ahb3lite_interconnect

  View on GitHub
  AHB3-Lite Interconnect
  ☆109May 10, 2024Updated last year
• aignacio / ahb_lite_bus

  View on GitHub
  AHB Bus lite v3.0
  ☆17Aug 7, 2019Updated 6 years ago
• paulscherrerinstitute / xvcSupport

  View on GitHub
  ☆18Oct 5, 2020Updated 5 years ago
• RoaLogic / plic

  View on GitHub
  Platform Level Interrupt Controller
  ☆46May 10, 2024Updated last year
• RoaLogic / ahb3lite_apb_bridge

  View on GitHub
  Parameterised Asynchronous AHB3-Lite to APB4 Bridge.
  ☆48May 10, 2024Updated last year
• RoaLogic / adv_dbg_if

  View on GitHub
  Universal Advanced JTAG Debug Interface
  ☆17May 10, 2024Updated last year
• syntacore / fpga-sdk-prj

  View on GitHub
  FPGA-based SDK projects for SCRx cores
  ☆18Jan 19, 2022Updated 4 years ago
• forth32 / mc1201-02

  View on GitHub
  FPGA-версия платы МС1201.02 и ЭВМ ДВК-3
  ☆13Mar 2, 2021Updated 5 years ago
• VictorTagayun / NUCLEO-G474RE_RealTime_FIR_IIR_FMAC

  View on GitHub
  Test Realtime FIR/IIR Filter using FMAC (Filter Math ACCcelerator). The FMAC unit is built around a fixed point multiplier and accumulato…
  ☆13Nov 10, 2021Updated 4 years ago
• RoaLogic / apb4_gpio

  View on GitHub
  General Purpose IO with APB4 interface
  ☆15May 10, 2024Updated last year
• tomverbeure / fpga_quick_ram_update

  View on GitHub
  Quickly update a bitstream with new RAM contents
  ☆16Jun 8, 2021Updated 4 years ago
• dabridgham / QSIC-verilog

  View on GitHub
  QBUS Storage and I/O Card
  ☆11Jan 6, 2024Updated 2 years ago
• pulp-platform / pulp-builder

  View on GitHub
  ☆10Feb 27, 2020Updated 6 years ago
• forth32 / vt52

  View on GitHub
  FPGA-версия терминалов VT52 и 15ИЭ-00-013
  ☆15Nov 20, 2020Updated 5 years ago
• muzafferkal / axi-bfm

  View on GitHub
  AXI3 Bus Functional Models (Initiator & Target)
  ☆30Dec 26, 2022Updated 3 years ago
• EmbeddedGeekYT / egSTM32

  View on GitHub
  Repository for keeping code from YouTube Tutorials
  ☆11Sep 27, 2022Updated 3 years ago
• freecores / uart16550

  View on GitHub
  UART 16550 core
  ☆39Jul 17, 2014Updated 11 years ago
• jeras / sockit_owm

  View on GitHub
  SocKit 1-wire (onewire) master
  ☆19Aug 5, 2012Updated 13 years ago
• Digilent / Petalinux-Zybo

  View on GitHub
  ☆28Mar 29, 2018Updated 7 years ago
• freecores / zpu

  View on GitHub
  ZPU - the worlds smallest 32 bit CPU with GCC toolchain
  ☆16Jul 17, 2014Updated 11 years ago
• emusan / FPGA_HDMI-pcb

  View on GitHub
  PCB layout for my cheap FPGA HDMI experimenting board
  ☆10Aug 21, 2014Updated 11 years ago
• RoaLogic / RV12

  View on GitHub
  RISC-V CPU Core
  ☆417Jun 24, 2025Updated 8 months ago
• ueqri / vis4mesh

  View on GitHub
  Visualization tool for designing mesh Network-on-Chips (NoC) and assisting with architecture research
  ☆17Jan 21, 2024Updated 2 years ago
• gsomlo / edk2

  View on GitHub
  EDK II
  ☆30Sep 3, 2018Updated 7 years ago
• Bryce-Readyhough / caravel_UNCC_MPW_1

  View on GitHub
  This is the Google/EFabless/Skywater Caravel submission of an Analog Spiking Neuron Circuit. The submission also includes a SONOS transis…
  ☆12Apr 21, 2023Updated 2 years ago
• pascallj / python3.12-backport

  View on GitHub
  Python 3.12 backport for Debian 12 bookworm
  ☆23Feb 10, 2025Updated last year
• embecosm / ri5cy

  View on GitHub
  The PULP RI5CY core modified for Verilator modeling and as a GDB server.
  ☆27Jan 11, 2019Updated 7 years ago
• MicroPhase / fpga-docs

  View on GitHub
  ☆16Oct 27, 2025Updated 4 months ago
• ahmad-mirsalari / PULP

  View on GitHub
  A public repository discussing the PULP (Parallel Ultra Low Power) platform for open-source RISC-V processors and associated software.
  ☆29Nov 18, 2025Updated 4 months ago
• csehydrogen / malloclab

  View on GitHub
  sysprog
  ☆10Jun 24, 2015Updated 10 years ago
• ics-jku / instruction-decoder

  View on GitHub
  ☆19Feb 12, 2026Updated last month
• os-hxfan / BayesNN_FPGA

  View on GitHub
  FPGA-based hardware acceleration for dropout-based Bayesian Neural Networks.
  ☆27Aug 15, 2023Updated 2 years ago
• raya4213 / VerilogCodeECC

  View on GitHub
  Research Interan@BARC FPGA based High-Throughput Generic ECC Implementation in Binary Extension Field
  ☆23Feb 20, 2017Updated 9 years ago
• PASSIONLab / distributed_sddmm

  View on GitHub
  Distributed SDDMM Kernel
  ☆12Jul 8, 2022Updated 3 years ago
• easysoc / layered-firrtl

  View on GitHub
  This repository is outdated and the related functionality has been migrated to https://github.com/easysoc/easysoc-firrtl
  ☆11Nov 3, 2021Updated 4 years ago
• fossi-foundation / wishbone

  View on GitHub
  Specification of the Wishbone SoC Interconnect Architecture
  ☆52Jun 5, 2022Updated 3 years ago
• digitalbazaar / equihash

  View on GitHub
  Equihash Proof of Work for Node.js
  ☆10Oct 3, 2017Updated 8 years ago
• edaa-org / pyEDAA.UCIS

  View on GitHub
  Unified Coverage Interoperability Standard (UCIS)
  ☆14Jan 28, 2026Updated last month
• arch-simulator-sig / simulator-paper

  View on GitHub
  ☆12Sep 18, 2024Updated last year