Alternatives and similar repositories for RedPitaya-FPGA

Users that are interested in RedPitaya-FPGA are comparing it to the libraries listed below

• dspsandbox / Pynq-Redpitaya-125
  ☆19Updated 5 months ago
• strath-sdr / rfsoc_sam
  RFSoC Spectrum Analyser Module on PYNQ.
  ☆85Updated last year
• Xilinx / RFSoC-PYNQ
  Python productivity for RFSoC platforms
  ☆79Updated 2 months ago
• dspsandbox / FPGA-Notes-for-Scientists
  ☆39Updated 2 months ago
• madamic / zynq_tdc
  A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC
  ☆67Updated 4 years ago
• apotocnik / redpitaya_guide
  Collections of guides and projects related to testing RedPitaya
  ☆56Updated 5 years ago
• Koheron / koheron-sdk
  SDK for FPGA / Linux Instruments
  ☆102Updated this week
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆30Updated 2 years ago
• sinara-hw / RFSOC-AMC
  AMC module with Xilinx RF-SoC and two analog front-end mezzanines for SDR and quantum applications
  ☆39Updated 2 years ago
• mathworks / HDL-Coder-Self-Guided-Tutorial
  Learn how to deploy an algorithm to an FPGA using MATLAB and Simulink.
  ☆85Updated 8 months ago
• capn-freako / PyBERT
  Serial communication link bit error rate tester simulator, written in Python.
  ☆113Updated 2 weeks ago
• sarafs1926 / ZCU216-PYNQ
  Board repo for the ZCU216 RFSOC
  ☆29Updated 3 years ago
• alex123go / RedPitaya_Acquisition
  Transform the Red Pitaya in an acquisition card
  ☆34Updated 4 years ago
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆51Updated 2 years ago
• Xilinx / PYNQ_RFSOC_Workshop
  Open-sourcing the PYNQ & RFSoC workshop materials
  ☆63Updated 4 years ago
• strath-sdr / rfsoc_qpsk
  PYNQ example of using the RFSoC as a QPSK transceiver.
  ☆107Updated 2 years ago
• strath-sdr / RFSoC-Book
  Companion Jupyter Notebooks for the RFSoC-Book.
  ☆229Updated 2 years ago
• strath-sdr / rfsoc_studio
  The Strathclyde RFSoC Studio Installer for PYNQ.
  ☆32Updated 2 years ago
• m-labs / tdc-core
  A 26ps RMS time-to-digital converter (TDC) core for Spartan-6 FPGAs
  ☆62Updated 10 years ago
• strath-sdr / rfsoc_radio
  PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.
  ☆37Updated 2 years ago
• davemuscle / sigma_delta_converters
  Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components
  ☆72Updated 3 years ago
• nkrackow / SingularitySurfer-FPGA-Lock-In-Amplifier
  Repository for the development of an FPGA based DSP Lock-In Amplifier
  ☆68Updated 2 years ago
• PyFPGA / pyfpga
  A Python package to use FPGA development tools programmatically.
  ☆138Updated 5 months ago
• BBN-Q / VHDL-JESD204b
  JESD204b modules in VHDL
  ☆30Updated 6 years ago
• ZipCPU / dpll
  A collection of phase locked loop (PLL) related projects
  ☆108Updated last year
• strath-sdr / rfsoc_qsfp_offload
  RFSoC QSFP Data Offload Design with GNU Radio
  ☆23Updated 9 months ago
• LukiLeu / FPGA_ADC
  An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components
  ☆46Updated 4 years ago
• RuiMachado39 / TDC
  Verilog implementation of a tapped delay line TDC
  ☆41Updated 6 years ago
• WarwickEPR / RePLIA
  FPGA Based lock in amplifier
  ☆35Updated last year
• quartiq / redpid
  migen + misoc + redpitaya = digital servo
  ☆40Updated 6 years ago