akaeba / tinyUARTLinks
Lightweight UART core in VHDL
☆13Updated 10 months ago
Alternatives and similar repositories for tinyUART
Users that are interested in tinyUART are comparing it to the libraries listed below
Sorting:
- A complete HDMI transmitter implementation in VHDL☆22Updated 5 months ago
- CologneChip GateMate FPGA Module: GMM-7550☆26Updated last month
- JavaScript action for users to easily install tip/nightly GHDL assets in GitHub Actions workflows☆16Updated 10 months ago
- VHDL plugin for RgGen☆13Updated 3 weeks ago
- Tests to evaluate the support of VHDL 2008 and VHDL 2019 features☆32Updated 10 months ago
- VHDL Code for infrastructural blocks (designed for FPGA)☆15Updated 3 years ago
- Library of reusable VHDL components☆28Updated last year
- Generate symbols from HDL components/modules☆21Updated 2 years ago
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆22Updated 2 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆58Updated 2 weeks ago
- A Risc-V SoC for Tiny Tapeout☆43Updated this week
- Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040☆35Updated 11 months ago
- Experiments with Cologne Chip's GateMate FPGA architecture☆17Updated 2 years ago
- An open-source VHDL library for FPGA design.☆32Updated 3 years ago
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆45Updated this week
- Template Verilator project for beginners☆13Updated 2 years ago
- UART to AXI Stream interface written in VHDL☆17Updated 3 years ago
- ☆24Updated 7 months ago
- Specification of the Wishbone SoC Interconnect Architecture☆48Updated 3 years ago
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆31Updated 3 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆63Updated 6 years ago
- Drop In USB CDC ACM core for iCE40 FPGA☆34Updated 4 years ago
- sample VCD files☆39Updated 2 months ago
- ulx3s ghdl examples☆14Updated 4 years ago
- A plain VHDL implementation of a small microprocessor fully compatible with the ISA of the well known PicoBlaze by Ken Chapman.☆22Updated 4 years ago
- Portable HyperRAM controller☆61Updated 11 months ago
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆44Updated 4 years ago
- Nitro USB FPGA core☆85Updated last year
- VHDL related news.☆27Updated this week
- Proposal to define an XML-based logging format for outputs from EDA tools and logging libraries.☆14Updated last week