Alternatives and similar repositories for RISC-V-All-Aboard-zh-cn

Users that are interested in RISC-V-All-Aboard-zh-cn are comparing it to the libraries listed below

• nju-mips / noop-lo
  A simple OoO processor developed by njuallen and wierton, it won 2nd prize in LoongsonCup18.
  ☆30Updated 5 years ago
• microdynamics-cpu / tree-core-cpu
  A series of RISC-V soft core processor written from scratch. Now, we're using all open-source toolchain (chisel, mill, verilator, NEMU, …
  ☆43Updated 2 years ago
• zetalog / sdfirm
  Ultra light weight small device firmware. Well architected to support MMU, SMP, low power idle. Can be run on various CPU architectures.
  ☆20Updated 3 months ago
• Nuclei-Software / e603_hbird
  RV64GC Linux Capable RISC-V Core
  ☆41Updated 3 weeks ago
• wuhanstudio / picorv32_tang
  A 32-bit RISC-V SoC on FPGA that supports RT-Thread.
  ☆29Updated 2 years ago
• ilg-archived / riscv-none-gcc
  The GNU MCU Eclipse RISC-V Embedded GCC
  ☆78Updated 6 years ago
• f0rm2l1n / riscv-simulator-guide
  RISC-V模拟器，相关硬件实现`riscv-isa-sim`以及模拟器pk, bbl的指导手册
  ☆53Updated 5 years ago
• ansonn / esl_systemc
  systemc建模相关
  ☆27Updated 11 years ago
• bigmagic123 / d1-nezha-baremeta
  riscv64 d1-nezha baremeta(Allwinner D1 riscv chip)
  ☆84Updated 3 years ago
• RPTU-EIS / RISCV-Core
  5-stage RISC-V core (RV32IM) with pipelining designed for educational purposes by RPTU Kaiserslautern, Germany
  ☆13Updated last year
• Nuclei-Software / NMSIS
  Nuclei Microcontroller Software Interface Standard Development Repo
  ☆79Updated this week
• plctlab / plct-qemu
  PLCT实验室维护的QEMU仓库。代码放在 plct- 前缀的分支里。
  ☆29Updated last month
• Nuclei-Software / nuclei-ai-library
  Nuclei AI Library Optimized For RISC-V Vector
  ☆13Updated last month
• oscc-ip / sdram
  An open source SDR SDRAM controller based on the AXI4 bus and verified by FPGA and tapeout. It can support memory particles of different …
  ☆20Updated 6 months ago
• LiHao217 / RISC-V_article_paper_src
  riscv资料、论文等
  ☆144Updated 7 years ago
• RISMicroDevices / CHIron
  Open-source AMBA CHI infrastructures (supporting Issue B, E.b)
  ☆29Updated this week
• whutddk / Rift2Core
  Based on Chisel3, Rift2Core is a 9-stage, out-of-order, 64-bits RISC-V Core, which supports RV64GC.
  ☆39Updated last year
• josecm / riscv-hyp-tests
  A bare-metal application to test specific features of the risc-v hypervisor extension
  ☆42Updated last year
• riscv-boom / riscv-coremark
  Setup scripts and files needed to compile CoreMark on RISC-V
  ☆71Updated last year
• oscourse-tsinghua / undergraduate-zwpu2019
  http://os.cs.tsinghua.edu.cn/research/undergraduate/zwpu2019
  ☆12Updated 6 years ago
• illustris / FreeRTOS-RISCV
  A port of FreeRTOS for the RISC-V ISA
  ☆78Updated 6 years ago
• chipsalliance / riscv-fw-infrastructure
  SDK Firmware infrastructure, contain RTOS Abstraction Layer, demos, SweRV Processor Support Package, and more ...
  ☆29Updated 3 years ago
• Nuclei-Software / nuclei-sdk
  Nuclei RISC-V Software Development Kit
  ☆150Updated this week
• TYOD-SOC / RISCV-Accelerator
  ☆37Updated 7 years ago
• horie-t / homemade-riscv-en
  Support Repository of "How to make RISC-V Microcomputer using FPGA for programmer"
  ☆18Updated 6 years ago
• baochuquan / RISCV-MMU
  ☆14Updated 8 years ago
• riscv-non-isa / tg-nexus-trace
  RISC-V Nexus Trace TG documentation and reference code
  ☆54Updated 10 months ago
• AlSaqr-platform / he-soc
  ☆32Updated 2 weeks ago
• ved-rivos / iommu-rtl
  RISC-V IOMMU in verilog
  ☆20Updated 3 years ago
• compiler-dev / llvm-rv
  Full Support 32bit RISC-V in LLVM and CLANG for Vector Extension
  ☆43Updated 4 years ago