Alternatives and similar repositories for PARD-gem5

Users that are interested in PARD-gem5 are comparing it to the libraries listed below

• LvNA-system / labeled-RISC-V
  ☆168Updated 4 years ago
• cyjseagull / SHMA
  SHMA: Software-managed Caching for Hybrid DRAM/NVM Memory Architectures, implemented with zsim and nvmain hybrid simulators
  ☆62Updated 8 years ago
• ucb-bar / ccbench
  Memory System Microbenchmarks
  ☆63Updated 2 years ago
• CGCL-codes / HSCC
  HSCC is implemented with zsim-nvmain hybrid simulator, it has achieved the following functions: (1) Memory management simulations (such a…
  ☆56Updated 4 years ago
• efeslab / lapidary
  Creating beautiful gem5 simulations
  ☆49Updated 4 years ago
• pranith / usimm
  USIMM: the Utah SImulated Memory Module
  ☆24Updated 10 years ago
• WukLab / Clio
  Clio, ASPLOS'22.
  ☆78Updated 3 years ago
• masc-ucsc / esesc
  ESESC: A Fast Multicore Simulator
  ☆138Updated 3 years ago
• basicthinker / Sexain-MemController
  A simulator of a memory controller designed for hybrid DRAM+NVM.
  ☆21Updated 9 years ago
• zainryan / INSIDER-System
  An FPGA-based full-stack in-storage computing system.
  ☆38Updated 4 years ago
• cyjseagull / gem5-nvmain-hybrid-simulator
  gem5-nvmain hybrid simulator supporting simulation of DRAM-NVM hybrid memory system
  ☆78Updated 6 years ago
• UCLA-VAST / blaze
  Blaze runtime system that support efficient accelerator integration for big data.
  ☆24Updated 8 years ago
• graphbig / graphBIG
  A Comprehensive Benchmark Suite for Graph Computing
  ☆70Updated 6 years ago
• Multi2Sim / multi2sim
  Multi2Sim source code
  ☆130Updated 6 years ago
• mit-carbon / Graphite
  A parallel, distributed simulator for multicores.
  ☆184Updated 9 years ago
• jfunston / MultiCacheSim
  A cache simulator designed to be used with memory access traces obtained from Pin (www.pintool.org)
  ☆23Updated 7 years ago
• pcie-bench / pcie-model
  ☆67Updated 6 months ago
• bamos / parsec-benchmark
  An unofficial mirror of the core PARSEC 3.0 benchmark suite with patches to run on x86_64 Arch Linux and generalize builds.
  ☆117Updated 3 years ago
• jimstevens2001 / HybridSim
  Simulator of a memory controller to connect DRAMSim and FlashDIMMSim into one unified memory
  ☆17Updated last year
• basicthinker / ThyNVM
  ThyNVM: Transparent hybrid NonVolatile Memory (NOTE: This repo is not working yet. Please refer to the old version: https://github.com/ba…
  ☆29Updated 7 years ago
• mattsinc / heterosync
  HeteroSync is a benchmark suite for performing fine-grained synchronization on tightly coupled GPUs
  ☆30Updated 11 months ago
• AXLEproject / axle-zsim-nvmain
  This is a fork of zsim (see https://github.com/s5z/zsim) which integrates the NVMain main memory simulator, adding 3D stacking and non-vo…
  ☆25Updated 10 years ago
• microsoft / DUA
  DUA, is a communication architecture that provides uniform access for FPGA to data center resources. Without being limited by machine bou…
  ☆38Updated 3 years ago
• stanford-mast / zsim
  A fast and scalable x86-64 multicore simulator
  ☆31Updated 4 years ago
• Liu-Cheng / graph-database-accel-survey
  ☆29Updated 8 years ago
• CMU-SAFARI / MemBen
  Benchmark suite containing cache filtered traces for use with Ramulator. These include some of the workloads used in our SIGMETRICS 2019 …
  ☆22Updated 4 years ago
• aakahlow / gem5Valid_Haswell
  ☆20Updated 5 years ago
• SEAL-UCSB / NVmain
  NVMain - An Architectural Level Main Memory Simulator for Emerging Non-Volatile Memories
  ☆84Updated 6 years ago
• heechul / palloc
  DRAM Bank-Aware Kernel Memory Allocator
  ☆42Updated 7 months ago
• fpgasystems / doppiodb
  doppioDB - A hardware accelerated database
  ☆49Updated 8 years ago