Juninho99 / FPGA_TangNano20k_Hand_Coded_DIP_LCD_Camera
Master-thesis-final
☆19Updated last year
Alternatives and similar repositories for FPGA_TangNano20k_Hand_Coded_DIP_LCD_Camera:
Users that are interested in FPGA_TangNano20k_Hand_Coded_DIP_LCD_Camera are comparing it to the libraries listed below
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆25Updated 2 months ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆38Updated 11 months ago
- DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.☆54Updated last year
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆41Updated 4 years ago
- ULPI Link Wrapper (USB Phy Interface)☆25Updated 4 years ago
- CologneChip GateMate FPGA Module: GMM-7550☆21Updated last year
- Experimental FPGA project for streaming two MIPI CSI camera streams to an HDMI monitor using a ULX3S FPGA board☆30Updated last year
- Collection of projects for various FPGA development boards☆44Updated 11 months ago
- Peripheral Component Interconnect has taken Express lane long ago, going for xGbps SerDes. Now (for the first time) in opensource on the …☆11Updated last week
- Wishbone interconnect utilities☆39Updated 2 months ago
- Reusable Verilog 2005 components for FPGA designs☆42Updated 2 months ago
- SDRAM controller optimized to a memory bandwidth of 316MB/s