Alternatives and similar repositories for riscv-linux-boot

Users that are interested in riscv-linux-boot are comparing it to the libraries listed below

• lowRISC / muntjac
  64-bit multicore Linux-capable RISC-V processor
  ☆93Updated 3 months ago
• ultraembedded / core_uriscv
  Another tiny RISC-V implementation
  ☆56Updated 4 years ago
• bluespec / RISCV_gdbstub
  A gdbstub for connecting GDB to a RISC-V Debug Module
  ☆31Updated 9 months ago
• ultraembedded / exactstep
  Instruction set simulator for RISC-V, MIPS and ARM-v6m
  ☆101Updated 3 years ago
• twilco / riscv-from-scratch
  The code for the RISC-V from scratch blog post series.
  ☆92Updated 4 years ago
• ee-uet / UETRV-PCore
  Linux Capable 32-bit RISC-V based SoC in System Verilog
  ☆59Updated 8 months ago
• openhwgroup / cv32e40s
  4 stage, in-order, secure RISC-V core based on the CV32E40P
  ☆147Updated 9 months ago
• merledu / nucleusrv
  NucleusRV - A 32-bit 5 staged pipelined risc-v core.
  ☆72Updated this week
• riscv / riscv-test-env
  ☆49Updated 2 months ago
• racerxdl / riscv-online-asm
  RISC-V Online Assembler using Emscripten, Gnu Binutils
  ☆56Updated last year
• riscv-admin / riscv-ovpsim
  ☆62Updated 4 years ago
• risclite / ARM9-compatible-soft-CPU-core
  This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone be…
  ☆88Updated 4 years ago
• regymm / quasiSoC
  Linux capable RISC-V SoC designed to be readable and useful.
  ☆151Updated 2 months ago
• embecosm / riscv-gdbserver
  GDB Server for interacting with RISC-V models, boards and FPGAs
  ☆20Updated 5 years ago
• michaeljclark / riscv-disassembler
  RISC-V Disassembler with support for RV32/RV64/RV128 IMAFDC
  ☆99Updated 3 years ago
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆54Updated 4 months ago
• riscv / configuration-structure
  RISC-V Configuration Structure
  ☆41Updated 9 months ago
• riscv / riscv-CMOs
  ☆89Updated 3 years ago
• emb-riscv / specs-markdown
  The preliminary 'RISC-V microcontroller profile' specs; for convenience, use markdown.
  ☆28Updated 3 years ago
• freecores / sparc64soc
  OpenSPARC-based SoC
  ☆69Updated 11 years ago
• riscv-non-isa / riscv-c-api-doc
  Documentation of the RISC-V C API
  ☆77Updated last week
• michaeljclark / busybear-linux
  busybear-linux is a tiny RISC-V Linux root filesystem image that targets the VirtIO board in riscv-qemu.
  ☆98Updated last year
• zephray / RISu064
  Dual-issue RV64IM processor for fun & learning
  ☆63Updated 2 years ago
• josecm / riscv-hyp-tests
  A bare-metal application to test specific features of the risc-v hypervisor extension
  ☆40Updated last year
• YosysHQ / nerv
  Naive Educational RISC V processor
  ☆85Updated 2 weeks ago
• stnolting / neorv32-riscof
  ✔️ Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
  ☆34Updated this week
• whutddk / Rift2Core
  Based on Chisel3, Rift2Core is a 9-stage, out-of-order, 64-bits RISC-V Core, which supports RV64GC.
  ☆40Updated last year
• chsasank / ARM7
  Implemetation of pipelined ARM7TDMI processor in Verilog
  ☆90Updated 7 years ago
• OpenXiangShan / nexus-am
  ☆35Updated 2 weeks ago
• zero-day-labs / riscv-iommu
  IOMMU IP compliant with the RISC-V IOMMU Specification v1.0
  ☆101Updated this week