Alternatives and similar repositories for spice-cpu

Users that are interested in spice-cpu are comparing it to the libraries listed below

• rolandbernard / kleine-riscv
  A small and simple rv32i core written in Verilog
  ☆17Updated 3 years ago
• mikeakohn / riscv_fpga
  Implementation of a RISC-V CPU in Verilog.
  ☆17Updated 11 months ago
• evanfrazierc / FPGA-MP3-Player
  ☆12Updated 10 years ago
• ucsbieee / mapache64
  Custom 6502 Video Game Console
  ☆12Updated 3 months ago
• TinyTapeout / tinytapeout-03
  ☆16Updated last year
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆41Updated 3 years ago
• nand2mario / ddr3-tang-primer-20k
  DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.
  ☆66Updated 2 years ago
• grughuhler / picorv32_tang_nano_20k
  PicoRV32 RISC-V project for Tang Nano 20K FPGA development board
  ☆37Updated last year
• sifferman / fpga_screensaver
  This project implements the VGA protocol and allows custom images to be displayed to the screen using the Sipeed Tang Nano FPGA dev board…
  ☆15Updated 2 years ago
• calint / tang-nano-9k--riscv--cache-psram
  RISC-V implementation of RV32I for FPGA board Tang Nano 9K utilizing on-board burst PSRAM, flash and SD card
  ☆45Updated 4 months ago
• hdl-util / vga-text-mode
  VGA-compatible text mode functionality
  ☆17Updated 5 years ago
• verilog-indeed / nano4k_hdmi_tx
  Open-source HDMI/DVI transmitter for the Gowin GW1NSR-powered Tang Nano 4K
  ☆24Updated 3 years ago
• Wren6991 / Hazard5
  5-stage RISC-V CPU, originally developed for RISCBoy
  ☆35Updated 2 years ago
• Toms42 / logisim-RISC-V-CPU
  ☆21Updated 8 years ago
• amstan / qoi-fpga
  Quite OK Image FPGA Encoder and Decoder
  ☆24Updated 2 years ago
• nsauzede / cpu86
  🔌 CPU86 - Free VHDL CPU8088 IP core - ported to Papilio and Max1000 FPGA
  ☆48Updated 5 months ago
• AntonMause / rv16poc
  16 bit RISC-V proof of concept
  ☆25Updated last month
• hamsternz / emulate-risc-v
  A very simple RISC-V ISA emulator.
  ☆39Updated 5 years ago
• ViktorSlavkovic / FPGA_Tetris
  FPGA Tetris written in Verilog
  ☆15Updated 7 years ago
• PebPeb / Single-Cycle-RV32I
  Single Cycle CPU using the RV32I Base Instruction set
  ☆19Updated 3 months ago
• nand2mario / sdram-tang-nano-20k
  NESTang SDRAM controller and usage example for Tang Nano 20K
  ☆49Updated last year
• olofk / qerv
  ☆20Updated 9 months ago
• dan-rodrigues / pico-hx
  PCB combining Raspberry Pi Pico and iCE40 FPGA
  ☆31Updated last year
• jrmoserbaltimore / risc-v-cpu-asynchronous
  A RISC-V CPU implementation
  ☆17Updated 5 years ago
• smunaut / iCE40linux
  Gateware / Firmware / BuildRoot to run linux on iCE40 / iCEBreaker
  ☆103Updated 2 years ago
• VHDPlus / VHDPlus_Libraries_and_Examples
  This is a collection of the built in libraries of the VHDPlus IDE toghether with examples. Commits will be featured in the IDE with futur…
  ☆20Updated last year
• Johnlon / spam-1
  Home Brew 8 Bit CPU Hardware Implementation including a Verilog simulation, an assembler, a "C" Compiler and this repo also contains my r…
  ☆70Updated 2 years ago
• qubeck78 / tangyRiscVSOC
  RiscV based SOC with 2D and 3D graphics acceleration for Tang Nano 20K
  ☆43Updated last year
• ShaheerSajid / RISCV
  32-bit soft RISCV processor for FPGA applications
  ☆19Updated 2 years ago
• zf3 / some-tang-nano-9k-examples
  Code examples for Sipeed Tang Nano 9K FPGA board including HDMI 720p and PSRAM controller usage.
  ☆19Updated 3 years ago