Alternatives and similar repositories for alterajtaguart

Users that are interested in alterajtaguart are comparing it to the libraries listed below

• azonenberg / antikernel-ipcores
  FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
  ☆64Updated last week
• pbing / USB
  FPGA USB 1.1 Low-Speed Implementation
  ☆34Updated 6 years ago
• defparam / PCI2Nano-RTL
  An open source FPGA PCI core & 8250-Compatible PCI UART core
  ☆41Updated 4 years ago
• no2fpga / no2usb
  Nitro USB FPGA core
  ☆84Updated last year
• HarmonInstruments / verilog
  ☆20Updated 2 years ago
• clairexen / picorv
  PicoRV
  ☆44Updated 5 years ago
• blackmesalabs / hyperram
  Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC
  ☆88Updated 6 years ago
• brouhaha / xchange
  Change part number or package in a Xilinx 7-series FPGA bitstream
  ☆39Updated 5 years ago
• lawrie / tiny_usb_examples
  Using the TinyFPGA BX USB code in user designs
  ☆50Updated 6 years ago
• GMM-7550 / gmm7550-hardware
  CologneChip GateMate FPGA Module: GMM-7550
  ☆22Updated last week
• no2fpga / no2muacm
  Drop In USB CDC ACM core for iCE40 FPGA
  ☆34Updated 3 years ago
• skristiansson / wb_sdram_ctrl
  SDRAM controller with multiple wishbone slave ports
  ☆29Updated 6 years ago
• lambdaconcept / lambdaUSB
  A configurable USB 2.0 device core
  ☆31Updated 4 years ago
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆40Updated 3 years ago
• colognechip / gatemate_ila
  The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …
  ☆51Updated last week
• blackmesalabs / s7_mini_fpga
  Example designs for the Spartan7 "S7 Mini" FPGA board
  ☆28Updated 6 years ago
• qermit / WishboneAXI
  Wishbone to AXI bridge (VHDL)
  ☆41Updated 5 years ago
• YosysHQ / yosys-plugins
  Yosys Plugins
  ☆21Updated 5 years ago
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆38Updated 3 years ago
• olofk / wb_intercon
  Wishbone interconnect utilities
  ☆41Updated 3 months ago
• tomverbeure / ecp5_jtag
  Use ECP5 JTAG port to interact with user design
  ☆28Updated 3 years ago
• hdl-util / sdram-controller
  Generic FPGA SDRAM controller, originally made for AS4C4M16SA
  ☆80Updated 4 years ago
• whitequark / icefloorplan
  iCE40 floorplan viewer
  ☆24Updated 6 years ago
• ZipCPU / fftdemo
  A demonstration showing how several components can be compsed to build a simulated spectrogram
  ☆46Updated last year
• m-labs / nmigen-boards
  Board and connector definition files for nMigen
  ☆30Updated 4 years ago
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆42Updated last week
• whitequark / Yumewatari
  妖刀夢渡
  ☆59Updated 6 years ago
• hamsternz / MMCM_GPSDO
  An all-digital GPS disciplined oscillator using MMCM phase shift.
  ☆30Updated 2 years ago
• icebreaker-fpga / icebreaker-amaranth-examples
  This repository contains iCEBreaker examples for Amaranth HDL.
  ☆38Updated last year
• xobs / lxbuildenv
  Simplified environment for litex
  ☆14Updated 4 years ago