Alternatives and similar repositories for hello-world:

Users that are interested in hello-world are comparing it to the libraries listed below

• zhouqinghua / zqh_riscv
  zqh_riscv is an open source SOC system based on riscv core and tilelink NOC bus. coding with PHGL language(python DSL language). this pro…
  ☆37Updated 3 years ago
• ansonn / esl_systemc
  systemc建模相关
  ☆27Updated 10 years ago
• zhaishaomin / ring_network-based-multicore-
  多核处理器 ;ring network , four core, shared space memory ,directory-based cache coherency
  ☆23Updated 8 years ago
• TYOD-SOC / RISCV-Accelerator
  ☆36Updated 6 years ago
• lingscale / cc01
  ☆31Updated last month
• microdynamics-cpu / tree-core-cpu
  A series of RISC-V soft core processor written from scratch. Now, we're using all open-source toolchain (chisel, mill, verilator, NEMU, …
  ☆39Updated last year
• brown9804 / PCIe_physical_layer
  Implementation of the PCIe physical layer
  ☆39Updated 3 months ago
• ananthbhat94 / DDR4MemoryController
  HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.
  ☆74Updated 7 years ago
• wangeddie67 / ESYSim
  ☆35Updated 11 months ago
• emwzq / example_uvm
  UVM实战随书源码
  ☆49Updated 6 years ago
• thuCGRA / SpinalHDL_Chinese_Doc
  Translated SpinalHDL-Doc(v1.7.2) into Chinese
  ☆48Updated last year
• dcblack / SCFTGU_BOOK
  Archives of SystemC from The Ground Up Book Exercises
  ☆30Updated 2 years ago
• Nuclei-Software / nuclei-board-labs
  Nuclei Board Labs
  ☆58Updated last year
• ljgibbslf / basic_cache_core
  ☆27Updated 4 years ago
• zhangly / azpr_cpu
  用Altera FPGA芯片自制CPU
  ☆41Updated 10 years ago
• zion-group / VerilogCodingStyle
  ☆63Updated 4 years ago
• Practical-UVM-Step-By-Step / Practical-UVM-IEEE-Edition
  This is the repository for the IEEE version of the book
  ☆58Updated 4 years ago
• hengfengzhang / soc
  soc integration script and integration smoke script
  ☆22Updated 2 years ago
• ic7x24 / verilog-mini-demo
  Verilog极简教程
  ☆36Updated 6 years ago
• FPGA-Networking / HyperParser
  ☆33Updated 2 years ago
• 2cc2ic / DMA-S2MM-and-MM2S
  Build an open source, extremely simple DMA.
  ☆22Updated 6 years ago
• huaweicloud / huaweicloud-fpga
  The official repository of the HUAWEI CLOUD FPGA Development Kit based on HUAWEI CLOUD FPGA Accelerated Cloud Server.
  ☆50Updated 6 years ago
• CherrySprings / CherrySprings
  ☆18Updated 2 years ago
• siyueyinghua / UVMInPracticesByZhangQiang
  《UVM实战》书本源代码和UVM 1.1d源码及Doc
  ☆36Updated 4 years ago
• pansygrass / ecc
  Verilog for a SECDED Hsaio ECC and a DEC ECC. Power, delay, and area are compared for Berkeley MASIC EEW241B - Advanced Digital Integrate…
  ☆44Updated 10 years ago
• mballance / clusterv-soc
  Quad cluster of RISC-V cores with peripherals and local memory
  ☆24Updated 3 years ago
• funannoka / SoC-Design-DDR3-Controller
  DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog
  ☆31Updated 6 years ago
• kdurant / axi-ddr3
  学习AXI接口，以及xilinx DDR3 IP使用
  ☆36Updated 8 years ago
• east1203 / ExamplesCode
  SystemVerilog、Verilog、UVM
  ☆13Updated 4 years ago
• panweitao / riscvv
  an open source uvm verification platform for e200 (riscv)
  ☆27Updated 7 years ago