DOUDIU / Hardware-Implementation-of-the-Canny-Edge-Detection-Algorithm

The Canny Edge Detection algorithm is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient to replicate using any simulator and any of the available FPGA boards, including those from Xilinx and Altera.
32Updated 9 months ago

Alternatives and similar repositories for Hardware-Implementation-of-the-Canny-Edge-Detection-Algorithm:

Users that are interested in Hardware-Implementation-of-the-Canny-Edge-Detection-Algorithm are comparing it to the libraries listed below