Alternatives and similar repositories for WinterCamp-2023-AIE

Users that are interested in WinterCamp-2023-AIE are comparing it to the libraries listed below

• tsinghua-ideal / spada-sim
  The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow
  ☆37Updated 2 years ago
• Yinxiao-Feng / chiplet-network-sim
  ☆29Updated 5 months ago
• casys-kaist / mNPUsim
  mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)
  ☆54Updated 5 months ago
• baichen318 / arch-explorer
  ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis
  ☆31Updated last year
• SET-Scheduling-Project / GEMINI-HPCA2024
  Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators
  ☆79Updated 3 weeks ago
• pku-liang / TENET
  An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…
  ☆84Updated last year
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆90Updated 7 months ago
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆31Updated 3 years ago
• qiyancos / gem5-with-chinese-comment
  Gem5 with chinese comment and introduction (master) and some other std gem5 version.
  ☆42Updated 3 years ago
• PKUZHOU / NeoMem-MICRO-2024
  The Artifact of NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering
  ☆51Updated 9 months ago
• RC4ML / Shuhai
  Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…
  ☆110Updated last year
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆79Updated last year
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆65Updated 10 months ago
• PolyArch / dsa-framework
  Release of stream-specialization software/hardware stack.
  ☆121Updated 2 years ago
• nqdtan / vck5000_vivado_ulp
  An alternative Vivado custom design example (to fully Vitis) for the User Logic Partition targeting VCK5000
  ☆12Updated 10 months ago
• UIUC-ChenLab / Nimblock
  ☆13Updated last year
• ucb-bar / MoCA
  ☆28Updated 2 years ago
• SET-Scheduling-Project / SET-ISCA2023
  The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.
  ☆67Updated 2 months ago
• GT-CHIPS / gem5_chips
  gem5 repository to study chiplet-based systems
  ☆72Updated 6 years ago
• PolyArch / gem-forge-framework
  ☆25Updated last year
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆71Updated 6 years ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆51Updated last month
• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆59Updated 7 months ago
• cucapra / EventQueue
  EQueue Dialect
  ☆40Updated 3 years ago
• UCLA-VAST / hbmbench
  ☆23Updated 4 years ago
• topanitanw / Cacti-7.0
  ☆11Updated last month
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆43Updated 2 years ago
• Yufeng98 / CENT
  Artifact for paper "PIM is All You Need: A CXL-Enabled GPU-Free System for LLM Inference", ASPLOS 2025
  ☆58Updated 2 weeks ago
• ConvolutedDog / HyFiSS
  HyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs
  ☆31Updated 5 months ago
• ucb-bar / dosa
  DOSA: Differentiable Model-Based One-Loop Search for DNN Accelerators
  ☆14Updated 7 months ago