Alternatives and similar repositories for agilent-pcie-analyzer-re

Users that are interested in agilent-pcie-analyzer-re are comparing it to the libraries listed below

• tongchen126 / fpga_pcie_ethernet
  ☆15Updated 3 years ago
• greatscottgadgets / bucatini
  a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface
  ☆32Updated 3 years ago
• ulixxe / usb_dfu
  Full Speed USB DFU interface for FPGA and ASIC designs
  ☆17Updated last year
• bad-alloc-heavy-industries / Trawler
  Bulk scrape and download datasheets from various vendors (insult)
  ☆14Updated 3 years ago
• ECP5-PCIe / ECP5-Utils
  Utilities for the ECP5 FPGA
  ☆18Updated 3 years ago
• prjunnamed / prjcombine
  An FPGA reverse engineering and documentation project
  ☆47Updated this week
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆58Updated last week
• trabucayre / quickfeather-notes
  Notes, scripts and apps to quickfeather board
  ☆10Updated 3 years ago
• apertus-open-source-cinema / ft60x-rs
  rust ftdi ft60x libusb driver
  ☆17Updated 4 years ago
• semify-eda / waveform-generator
  Waveform Generator
  ☆11Updated 2 years ago
• hamsternz / lfsr_scramblers
  Experiments with self-synchronizing LFSR scramblers
  ☆15Updated 4 years ago
• fallen / SucreLA
  Open source Logic Analyzer based on LiteX SoC
  ☆25Updated last month
• enjoy-digital / thunderscope
  LiteX based FPGA gateware for Thunderscope.
  ☆25Updated last year
• adamgreig / daqnet
  ☆64Updated 4 years ago
• 360nosc0pe / scope
  Siglent SDS1x0xX-E FPGA bitstreams
  ☆41Updated 5 months ago
• jevinskie / liteluna
  LiteX LUNA USB stack integration
  ☆14Updated 2 years ago
• OpenCAPI / omi_device_ice
  An example OMI Device FPGA with 2 DDR4 memory ports
  ☆16Updated 2 years ago
• PavlenkoG / ECP5_PCIE_Analyzer
  ☆14Updated last year
• enjoy-digital / pcie_analyzer
  PCIe analyzer experiments
  ☆52Updated 5 years ago
• hydrausb3 / wch-ch569-serdes
  WCH CH569 SerDes Reverse Engineering
  ☆26Updated 2 years ago
• amaranth-lang / amaranth-stdio
  Industry standard I/O for Amaranth HDL
  ☆28Updated 7 months ago
• dan-rodrigues / ulx3s-bluetooth-gamepad
  Bluetooth gamepad receiver demo using ULX3S FPGA board + ESP32
  ☆10Updated 4 years ago
• xobs / lxbuildenv
  Simplified environment for litex
  ☆14Updated 4 years ago
• Icenowy / aw-el2-barebone
  Allwinner SoCs' 64-bit EL2 barebone
  ☆17Updated 2 years ago
• Wren6991 / Hazard3-SWD-SoC
  Example Hazard3 + OpenDAP RISC-V SWD SoC integration
  ☆9Updated 2 years ago
• rprinz08 / arty-s7-multinic
  ArtyS7-50 VexRiscV LiteX SoC using multiple Ethernet Interface
  ☆13Updated 4 years ago
• b-dmitry1 / V188
  FPGA 80186 IBM PC compatible system for Altera Cyclone IV (EP4CE15F23/EP4CE55F23)
  ☆21Updated 3 years ago
• bad-alloc-heavy-industries / dragonBoot
  A small but extremely fast safe USB DFU bootloader for both microcontroller and FPGA
  ☆12Updated 4 months ago
• lawrie / ulx3s_bit_streams
  Bit streams forthe Ulx3s ECP5 device
  ☆17Updated 2 years ago
• amaranth-lang / rfcs
  RFCs for changes to the Amaranth language and standard components
  ☆18Updated 3 weeks ago