Shahriar-0 / Digital-Logic-Design-Lab-Experiments-S2023Links
Verilog implementation of different concepts in Digital Logic Design such as OTHFSM, AFG and Accelerators
☆10Updated last year
Alternatives and similar repositories for Digital-Logic-Design-Lab-Experiments-S2023
Users that are interested in Digital-Logic-Design-Lab-Experiments-S2023 are comparing it to the libraries listed below
Sorting:
- Physical Downlink Shared Channel (PDSCH) in 5G New Radio.☆11Updated last year
- 基于GSConv+SlimNeck的YOLOv5的消防通道占用检测系统☆10Updated last year
- 开发环境是Windows 10, Quartus。硬件开发语言是Verilog。 利用FPGA开发的智能小车，分为两个部分，控制器部分和小车部分，通过蓝牙信号进行连接。 控制部分可以通过加速度传感器检测手势，从而控制小车的前后左右。 加速度传感器还可以检测人体是否摔倒…☆14Updated 6 years ago
- lusixing / Joint-Decoding-Framework-for-LDPC-coded-MIMO-SCMA-Systems-Based-on-Expectation-PropagationA generalized efficient decoding framework that performs joint decoding for non-binary low density parity check code (NB-LDPC) coded spa…☆10Updated 5 months ago
- 关于数字IC的笔试面试题☆12Updated 5 years ago
- 本文提出了一种基于多视图卷积神经网络的三维物体识别算法，以实现三维物体的准确识别。首先实现一个标准的卷积神经网络架构，该架构经过训练可以独立地识别形状的渲染视图，以实现即使从单一视图中也可以识别出一 个三维形状。随后使用该三维物体多个角度的二维视图通过卷积神经网络识别的结果进…☆11Updated 3 years ago
- A Beginner's Python Guide for Data Analysis☆22Updated 5 years ago
- Sobel is first order or gradient based edge operator for images and it is implemented using verilog.☆14Updated 4 years ago
- This repo is to inplemente the riscv soc on the xilinx pynq-z2 board☆11Updated last year
- 基于FPGA-Pynq的车牌识别系统。The LPR system of FPGA-Pynq☆12Updated 6 years ago
- Controller module for RISC-V core CI/CD☆17Updated 3 months ago
- Polar codes are error correction codes developed by Erdal Arikan which achieves channel capacity and its reduced complexity makes it more…☆17Updated 4 years ago
- Digital IC design and vlsi notes☆12Updated 5 years ago
- Workflow for Executing CNN Networks on Zynq Ultrascale+ with VITIS AI. Detailed analysis, configuration, and execution of Convolutional N…☆17Updated last year
- 使用FPGA制作机器人，并使用python建立上位机，FPGA机器人通过控制ESP8266通过WiFi进行无线通讯，来达到上位机控制FPGA机器人的目的☆25Updated 5 years ago
- Learning Environment-aware and hardware-compatible beam-forming codebooks☆14Updated 5 years ago
- Verilog code for a low power RFID chip that will communicate with I2C sensors.☆13Updated 11 years ago
- wifi☆12Updated 8 years ago
- DSP University Project - Matlab, Simulations, and Verilog Files☆12Updated 5 years ago
- Final year research project to design a programmable virtual switch based on the specifications of a TSN to be implemented on a TSN netwo…☆13Updated 4 years ago
- “A Robust Learning Membership Scaling Fuzzy C-Means Algorithm Based on New Belief Peak“. Fuzzy clustering algorithm including RL_MFCM,RL_…☆10Updated last year
- Docker image with Xilinx FPGA Tools (Vivado - SDAccel) usable with GUI on Mac☆10Updated 6 years ago
- All switching software as well as control software for a physically and emulated capable network coding switch. FPGA Acceleration added .…☆10Updated 5 years ago
- Bring FPGA accelerators as a resources available through Docker containers for the OpenStack users.☆16Updated 2 years ago
- 基于FPGA的数字调制系统 ：实现m序列作为信源，并通过按键来选择移位相加的初始值和步进值以及实现2ASK、2FSK、2PSK☆19Updated 4 years ago
- Matlab Simulation for DVB-S☆12Updated 9 years ago
- This is a software reference code to implement the FPGA remote debug feature. User will compile the reference code into a user space appl…☆14Updated 3 months ago
- Software-Hardware Implementation of IEEE 802.11a Wifi Standard☆14Updated 2 years ago
- Hardware implementation of HDR image producing algorithm☆16Updated 2 years ago
- Python Functions to generate the sequences for 5G NR PSS and SSS and correlate☆11Updated 6 years ago