☆17Jul 26, 2026Updated last month
Alternatives and similar repositories for ArchXBench
Users that are interested in ArchXBench are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆59Jul 13, 2026Updated last month
- ☆49May 18, 2024Updated 2 years ago
- [DATE 2025] haven: hallucination-mitigated llm for verilog code generation aligned with hdl engineers☆44Jul 9, 2025Updated last year
- TuRTLe: A Unified Evaluation of LLMs for RTL Generation 🐢 (MLCAD 2025, ACM TODAES 2026)☆48Jul 22, 2026Updated last month
- ICCD'24 paper: "AutoVCoder: A systematic framework for automated verilog code generation"☆26Dec 17, 2024Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- ☆20Oct 17, 2024Updated last year
- RV32I Open Source GPU☆14Feb 9, 2021Updated 5 years ago
- ☆181Mar 10, 2025Updated last year
- Contract-Aware RTL Code Generation Agents with Temporal Tracing, Slicing and Formal Verification☆24Jan 28, 2026Updated 7 months ago
- ☆211Jun 8, 2026Updated 2 months ago
- A numpy like array programming language optimized with BuildIt☆14Oct 17, 2025Updated 10 months ago
- MAGE: A Multi-Agent Engine for Automated RTL Code Generation☆134Apr 11, 2025Updated last year
- OriGen: Enhancing RTL Code Generation with Code-to-Code Augmentation and Self-Reflection(ICCAD 2024)☆34Oct 20, 2024Updated last year
- Offical implementation of our paper "Exploring the Potential of Diffusion Large Language Models in Code Generation".☆22Oct 29, 2025Updated 10 months ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- RTL-Repo: A Benchmark for Evaluating LLMs on Large-Scale RTL Design Projects - IEEE LAD'24☆34Jun 5, 2024Updated 2 years ago
- pcie datalink layer implementation in verilog/systemverilog☆16May 22, 2026Updated 3 months ago
- my rc files☆12Mar 16, 2016Updated 10 years ago
- A Portable Linux-based Firmware for NVMe Computational Storage Devices☆36Jun 10, 2025Updated last year
- ☆65Sep 4, 2025Updated 11 months ago
- Verilog evaluation benchmark for large language model☆465Jul 14, 2025Updated last year
- DeepGate3 for ICCAD2024☆14May 26, 2025Updated last year
- ☆18Dec 30, 2023Updated 2 years ago
- Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)☆59Jan 8, 2025Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆52Jan 16, 2025Updated last year
- Language Models for Code Completion: a Practical Evaluation☆13Jan 19, 2024Updated 2 years ago
- ☆21Updated this week
- Github repository of the AIStats 2024 paper: DE-HNN: An effective neural model for Circuit Netlist representation☆17Sep 3, 2025Updated 11 months ago
- ☆15Oct 8, 2024Updated last year
- Create and use hybrid workflows to solve problems.☆12Oct 31, 2023Updated 2 years ago
- A perfectly emulated SATA device It's clear that some anti-cheat systems that only detect device drivers and simple TLP behavior are eas…☆20Dec 6, 2025Updated 8 months ago
- This repository includes the data and scripts utilized in the study titled "Improving LLM-based Verilog Code Generation with Data Augment…☆14Mar 24, 2025Updated last year
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆152Jul 23, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Reference code for https://arxiv.org/abs/1906.08879☆18Oct 25, 2019Updated 6 years ago
- An open-source benchmark for generating design RTL with natural language☆223Aug 15, 2026Updated 2 weeks ago
- Serpens is an HBM FPGA accelerator for SpMV☆23Jul 26, 2024Updated 2 years ago
- ☆19Jul 2, 2024Updated 2 years ago
- ☆57Jan 6, 2026Updated 7 months ago
- CPPL: A Circuit Prompt Programming Language☆20Aug 19, 2026Updated last week
- Offical implementation of the paper "Rhizomorph: The Coordinated Function of Shoots and Roots"☆15Nov 21, 2023Updated 2 years ago