Transfer data over UDP with a Zedboard. This is an example project that transmits and receives data over UDP.
☆30Mar 24, 2021Updated 5 years ago
Alternatives and similar repositories for Zynq_UDP
Users that are interested in Zynq_UDP are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- minimal code to access ps DDR from PL☆23Oct 18, 2019Updated 7 years ago
- ChipScope / ILA using XVC (XIlinx Virtual Cable Over PCIe) with a PR (Partial Reconfiguration) design Example.☆15Jun 1, 2017Updated 9 years ago
- Smart camera with OV 7670 and Zynq☆52May 17, 2022Updated 4 years ago
- DMA source and sink blocks for Xilinx Zynq FPGAs☆24May 19, 2020Updated 6 years ago
- Zynq project to interface OV2640 camera module☆16Mar 11, 2016Updated 10 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- FPGA accelerator on GNU Radio and Zynq SoC☆16Feb 23, 2017Updated 9 years ago
- Imaging application using MIPI and DisplayPort to process image☆25Feb 13, 2020Updated 6 years ago
- Getting started guide for learning and evaluating HDL Coder☆12Jun 24, 2025Updated last year
- Open Source ZYNQ Board☆31Aug 19, 2015Updated 11 years ago
- Zynq Workshop for Beginners☆33May 21, 2015Updated 11 years ago
- A collection of Opal Kelly provided design resources☆19Oct 27, 2026Updated last week
- ☆15Jun 22, 2022Updated 4 years ago
- A configuration controller solution allowing a Zynq device to configure downstream FPGAs☆14Oct 5, 2015Updated 11 years ago
- pynq framework for antsdr☆37May 31, 2024Updated 2 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- ☆15Jan 30, 2013Updated 13 years ago
- Updated Xilinx PYNQ for Zynq + ZynqMP python HW acceleration development☆13Mar 16, 2018Updated 8 years ago
- Wi-Fi enabled XVC programmer/debugger based on ESP8266☆12May 31, 2015Updated 11 years ago
- X.org graphics driver for ARM graphics(with Zynq UltraScale+ MPSoC)☆15Sep 29, 2022Updated 4 years ago
- Improving Single-Network Single-Channel Separation of Musical Audio with Convolutional Layers☆11Jul 3, 2018Updated 8 years ago
- Simple AMP Running Linux and Bare-Metal System on Both Zynq SoC Processors☆23Dec 17, 2015Updated 10 years ago
- PYNQ for Zybo board☆15Jan 30, 2026Updated 9 months ago
- A collection of tools for working with Chisel-generated hardware in SystemC☆16Jul 23, 2019Updated 7 years ago
- A verilog FPGA Interface for AXI4_Lite from Slave side☆13Jun 14, 2020Updated 6 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- 基于ALINX-AX7020平台的Linux驱动开发学习。☆58Mar 27, 2020Updated 6 years ago
- ☆25Apr 12, 2025Updated last year
- Example design for the Ethernet FMC using the hard GEMs of the Zynq☆63Oct 26, 2026Updated last week
- Predicting the position of satellites is one of the big challenges in astronomy. More than 500,000 pieces of debris are tracked as they o…☆10Mar 10, 2020Updated 6 years ago
- Xilinx ZynqMP AXI-ACP Adapter☆21May 18, 2026Updated 5 months ago
- AWGN signal generator IP for FPGA implemented by Verilog HDL with Fmax up to 320MHz on Xilinx Virtex Ultra-Scale FPGA.☆16Sep 20, 2020Updated 6 years ago
- Scripts to install an ubuntu dev environment☆15Apr 24, 2020Updated 6 years ago
- This is forked from Xilinx HLS-Tiny-Tutorial. I'm learning HLS and adding Verilator testbench to verify the generated RTL☆28Oct 4, 2021Updated 5 years ago
- File editor for the Xilinx AXI Traffic Generator IP☆17Feb 9, 2026Updated 8 months ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.☆91Jun 29, 2023Updated 3 years ago
- A simple script to build a PMU firmware for Xilinx ZynqMP☆41Jul 27, 2026Updated 3 months ago
- Adapter board exposing SATA M.2 SSD on FMC board-to-board connector☆17Aug 7, 2023Updated 3 years ago
- Notes on the QMTECH ZYNQ XC7Z020 starter kit☆15Jul 2, 2025Updated last year
- Software defined radio on a STM32H7 microcontroller☆15Sep 17, 2023Updated 3 years ago
- ☆13Apr 12, 2023Updated 3 years ago
- This repository provides a Linux kernel driver for AXI UART Lite accessed via PCIe XDMA. It enables efficient DMA-based UART communicatio…☆16May 2, 2025Updated last year