Security Test Benchmark for Computer Architectures
☆21Sep 24, 2025Updated 5 months ago
Alternatives and similar repositories for cpu-sec-bench
Users that are interested in cpu-sec-bench are comparing it to the libraries listed below
Sorting:
- ☆22Nov 12, 2020Updated 5 years ago
- Hardware-assisted Data-flow Isolation☆29Jan 28, 2018Updated 8 years ago
- A behavioural cache model for analysing the cache behaviour under side-channel attack.☆28Jun 25, 2025Updated 8 months ago
- Data-centric defense mechanism against Spectre attacks. (DAC'19)☆11Nov 6, 2019Updated 6 years ago
- Group administration repository for Tech: IOPMP Task Group☆13Dec 19, 2024Updated last year
- ☆14Dec 30, 2021Updated 4 years ago
- Test suite containing a reproduction of all major transient-execution attacks in RISC-V and CHERI-RISC-V assembly☆17Jun 7, 2021Updated 4 years ago
- Memory Tagging ISA extension that can be used by software to enforce memory tag checks on memory loads and stores☆28Dec 18, 2025Updated 2 months ago
- ☆14Feb 18, 2021Updated 5 years ago
- ☆32Jul 11, 2022Updated 3 years ago
- LLVM Implementation of different ShadowStack schemes for x86_64☆39May 2, 2020Updated 5 years ago
- Opening Pandora's Box: A Systematic Study of New Ways Microarchitecture can Leak Private Data☆20Oct 13, 2022Updated 3 years ago
- ☆25Jun 2, 2024Updated last year
- ☆20Mar 10, 2022Updated 3 years ago
- RISC-V Tools (GNU Toolchain, ISA Simulator, Tests)☆23May 9, 2019Updated 6 years ago
- ☆25Oct 4, 2018Updated 7 years ago
- This is the repository for the code and artifacts related to the CCS2022 paper: C2C: Fine-grained Configuration-driven System Call Filter…☆11Nov 4, 2022Updated 3 years ago
- ☆14Dec 1, 2020Updated 5 years ago
- Spectre variant 1 exploitation via PRIME+PROBE☆10May 22, 2019Updated 6 years ago
- Code repository for the research paper "A Systematic Look at Ciphertext Side Channels on AMD SEV-SNP"☆14May 17, 2022Updated 3 years ago
- The PT tracing portion of Barnum.☆11Feb 8, 2019Updated 7 years ago
- Collection of Spectre-type, Meltdown-type and MDS-type PoCs☆10Aug 25, 2020Updated 5 years ago
- ☆23Jun 23, 2023Updated 2 years ago
- A Compiler-based System for Secure Memory Instrumentation and Execution in Enclaves☆29Feb 25, 2021Updated 5 years ago
- ☆25Jun 16, 2021Updated 4 years ago
- ☆22Nov 16, 2023Updated 2 years ago
- Code Repository for DataGuard Framework☆13Jul 11, 2023Updated 2 years ago
- Intra-Unikernel Isolation with Intel Memory Protection Keys☆13Mar 18, 2020Updated 5 years ago
- Resillent Control-Flow Attestation☆13Sep 30, 2021Updated 4 years ago
- A port of the RIPE suite to RISC-V.☆29Oct 10, 2018Updated 7 years ago
- oo7, a binary analysis tool to defend against Spectre vulnerabilities☆34Oct 16, 2020Updated 5 years ago
- ☆13Apr 9, 2022Updated 3 years ago
- LibVMI in MiniOS☆12May 22, 2021Updated 4 years ago
- Source code of AsiaCCS'22 paper - RecIPE: Revisiting the Evaluation of Memory Error Defenses☆13Sep 19, 2023Updated 2 years ago
- A Rocket-Chip with a Dynamically Randomized LLC☆13Sep 18, 2024Updated last year
- like ROP Defender☆11May 6, 2015Updated 10 years ago
- RISC-V Security HC admin repo☆18Jan 7, 2025Updated last year
- ☆37May 19, 2023Updated 2 years ago
- Partitioned Unit Memory Management☆16Nov 28, 2022Updated 3 years ago