riscv / riscv-memory-taggingLinks
Memory Tagging ISA extension that can be used by software to enforce memory tag checks on memory loads and stores
☆22Updated last week
Alternatives and similar repositories for riscv-memory-tagging
Users that are interested in riscv-memory-tagging are comparing it to the libraries listed below
Sorting:
- Security Test Benchmark for Computer Architectures☆21Updated last week
- Artifact evaluation of paper: MorFuzz: Fuzzing Processor via Runtime Instruction Morphing enhanced Synchronizable Co-simulation☆45Updated 5 months ago
- Opening Pandora's Box: A Systematic Study of New Ways Microarchitecture can Leak Private Data☆20Updated 2 years ago
- A behavioural cache model for analysing the cache behaviour under side-channel attack.☆26Updated 3 months ago
- This repository contains the hardware, software, and OS support for the Programmable Hardware Monitor (PHMon).☆26Updated 5 years ago
- HW interface for memory caches☆28Updated 5 years ago
- Tests for verifying compliance of RMM implementations☆19Updated 2 weeks ago
- A tool for detecting Spectre vulnerabilities through fuzzing☆43Updated 4 years ago
- Data oblivious ISA prototyped on the RISC-V BOOM processor.☆22Updated 3 years ago
- ☆34Updated 2 years ago
- ☆95Updated last year
- Proof-of-concept code for the IEEE S&P 2025 paper "Peek-a-Walk: Leaking Secrets via Page Walk Side Channels"☆26Updated 3 months ago
- Using Malicious #VC Interrupts to Break AMD SEV-SNP (IEEE S&P 2024)