Examples from the book by Deschamps et al. https://www.amazon.com/Implementation-Arithmetic-Functions-Electrical-Engineering/dp/9400729863
☆19Apr 17, 2019Updated 7 years ago
Alternatives and similar repositories for Guide-to-FPGA-Implementation-of-Arithmetic-Functions
Users that are interested in Guide-to-FPGA-Implementation-of-Arithmetic-Functions are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆35Jul 8, 2026Updated 3 months ago
- Fast Hilbert Curve Generation, Sorting, and Range Queries☆16Feb 5, 2016Updated 10 years ago
- An example of how to use Avalon interrupts on the Cyclone V FPGA☆14May 25, 2014Updated 12 years ago
- Open Source Silicon Development Testing Unit using JTAG☆15Apr 25, 2026Updated 5 months ago
- Monte Carlo Render Viewing and Visualization Tools☆11Apr 20, 2021Updated 5 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- UDP/IP Core☆12Jul 17, 2014Updated 12 years ago
- A demo demonstrating a high precision RT caustics algorithm, which has been integrated into NVIDIA's UE4 RTX branch (https://github.com/N…☆35Aug 6, 2022Updated 4 years ago
- Artifact associated with CHES 2022 paper https://tches.iacr.org/index.php/TCHES/article/view/9817☆12Nov 10, 2023Updated 2 years ago
- FPGA implementation of a handwritten digit recognition system based on k-nearest-neighbors (k-NN) classifier algorithm.☆21Apr 3, 2018Updated 8 years ago
- ☆11Sep 7, 2023Updated 3 years ago
- Mirror of tachyon-da cvc Verilog simulator☆58Mar 16, 2026Updated 7 months ago
- BK-0010-01 on ESP8266 emulator☆37Feb 8, 2019Updated 7 years ago
- For publishing the source for UG1352 "Get Moving with Alveo"☆51Jun 17, 2020Updated 6 years ago
- A simple implementation of the Karatsuba multiplication algorithm☆12Apr 2, 2025Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- a cyclic redundancy check(one kind of Error Correcting Code) software(MATLAB) and hardware(Verilog HDL) implementation.☆11Dec 14, 2019Updated 6 years ago
- Convolutional Neural Net written for implementation on an FPGA☆21Jun 26, 2017Updated 9 years ago
- Sample benchmark demonstrating the VK_NV_cooperative_vector extension☆15Dec 22, 2025Updated 9 months ago
- TCP/IP and UDP/IP protocol stack off-loading☆19Aug 9, 2020Updated 6 years ago
- This is a SystemVerilog HDL implementation of Karatsuba multiplier.☆11Jul 8, 2020Updated 6 years ago
- The code for Joint Neural Architecture Search and Quantization☆14Apr 10, 2019Updated 7 years ago
- free5GC official site☆15Oct 5, 2026Updated last week
- Code for fast approximate generalized winding number (solid angle) computation for triangle soups☆17Feb 17, 2022Updated 4 years ago
- Code for the ISCAS23 paper "The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks"☆11Apr 20, 2023Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- implementing a Recurrent Neural Network with binarized weight format on FPGA☆22Sep 3, 2017Updated 9 years ago
- Neural Network for Pattern Recognition on an FPGA. Project for Education. Video lectures explain training of the network and FPGA impleme…☆24May 15, 2024Updated 2 years ago
- Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation☆14Nov 28, 2019Updated 6 years ago
- Circuit-level model for the Capacity-Latency Reconfigurable DRAM (CLR-DRAM) architecture. This repository contains the SPICE models of th…☆16Sep 24, 2020Updated 6 years ago
- ☆12Jun 4, 2018Updated 8 years ago
- A RISC-V 32 bits, Out Of Order, single issue with branch prediction CPU, implementing the B, C, M and Zfinx extensions.☆22Sep 30, 2026Updated 2 weeks ago
- Codebooks with Integral-Split Self-Interference Reduction for Integrated Sensing and Communication☆15Oct 8, 2026Updated last week
- This repository contains all the parameters you need to synthesize the AlexNet by using Vivado High Level Synthesis.☆21Mar 5, 2018Updated 8 years ago
- Chisel RTL module of a unified ray tracer datapath pipeline. Supports ray-box intersection, ray-triangle intersection, acceleration for …☆16Jul 18, 2026Updated 2 months ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- A blazing fast, MT-safe, lockfree and branchless circular byte buffer for SPSC in 50 loc☆13Sep 16, 2025Updated last year
- Zcash FPGA acceleration engine☆135Sep 10, 2020Updated 6 years ago
- An MIT graphics library for the Badge.Team and the wider community.☆22Aug 7, 2026Updated 2 months ago
- Open-source implementations of reference Physical True Random Number Generators (TRNG or PTRNG) based on ring oscillators.☆20Mar 26, 2026Updated 6 months ago
- Plugin for Autodesk Navisworks 2019 that creates a new custom property tab☆11Dec 24, 2020Updated 5 years ago
- Testfield: T593☆15Apr 27, 2026Updated 5 months ago
- 3.3V SRAM macros for GF180MCU, based on the original 5V SRAM macros.☆24Jun 19, 2026Updated 3 months ago