EttusResearch / meta-ettusLinks
Yocto Project BSPs for Ettus Products
☆37Updated last month
Alternatives and similar repositories for meta-ettus
Users that are interested in meta-ettus are comparing it to the libraries listed below
Sorting:
- IIO AD9361 library for filter design and handling, multi-chip sync, etc.☆93Updated 3 weeks ago
- Open source Zynq timestamping implementation from Software Radio Systems (SRS)☆73Updated 2 years ago
- Example applications for UHD/RFNoC☆18Updated 3 years ago
- MATLAB toolbox for ADI transceiver products☆62Updated 7 months ago
- IIO blocks for GNU Radio☆105Updated 2 years ago
- An OpenEmbedded layer for people working on Software Defined Radio☆54Updated this week
- RFNoC out-of-tree module for a channelizer☆16Updated 7 years ago
- ☆27Updated 8 years ago
- OscillatorIMP ecosystem for the digital characterization of ultrastable oscillators and Software Defined Radio (SDR) frontend processing☆58Updated 3 weeks ago
- This repo contains both the uhd host driver and firmware for microphase antsdr devices.☆82Updated 9 months ago
- this project make nh7020 firmware☆32Updated 3 years ago
- BR2_EXTERNAL framework for Analog Device's PlutoSDR Zynq☆46Updated 11 months ago
- Work being done on the DVB-receiver for Phase 4 Ground.☆59Updated 2 years ago
- ☆69Updated 2 years ago
- pynq framework for antsdr☆36Updated last year
- Small scripts and examples to make interacting with the PlutoSDR easier☆95Updated last year
- ANTSDR Firmware☆136Updated 2 years ago
- ADI Scripts for Linux images☆28Updated 3 months ago
- RTL implementation of components for DVB-S2☆128Updated 2 years ago
- Labs for SDR for Engineers textbook☆46Updated 4 years ago
- Repository of antsdr firmware make☆74Updated 3 months ago
- AD9361 based USB3 SDR☆117Updated 8 years ago
- The official Xilinx u-boot repository☆18Updated 2 weeks ago
- ☆24Updated 5 years ago
- ☆38Updated last month
- Out-of-tree GNU Radio Module for Experimental Ettus Research Features☆53Updated 2 years ago
- A ressource efficient, customizable, synthesizable 5G NR lower PHY written in Verilog☆214Updated 5 months ago
- Open-source 802.11a WLAN PHY☆65Updated 4 years ago
- Altera Cyclone IV FPGA project for the USB 3.0 LimeSDR board☆105Updated 4 years ago
- OpenCL/GPU-enabled common blocks for GNURadio☆85Updated 2 years ago